Vendor: M31 Technology Corp. Category: Single-Protocol PHY

USB2.0 build-in clock PHY, SMIC 55LL

In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function.

USB 2.0 SMIC 55nm LL View all specifications

Overview

In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function. M31’s patented BCK (Built-in-Clock, a.k.a. Crystal-less) technology is an innovative way to save BOM(Bill of Materials) cost by reducing an external crystal for mobile USB devices. In general, this solution has been popularly adopted by those USB devices in applications like flash drive, wireless transmitter, sound card, webcam. During USB data transfer, the IP performs a background calibration to ensure frequency accuracy. The USB IP with BCK complies with the USB-IF specification and has the same electrical performance as the standard USB IP.

Key features

  • Smallest USB 3.2 Gen1x1 BCK PHY IP worldwide (e.g. IP size @40nm <0.36mm²)
  • Fully compliant with Universal Serial Bus USB 3.2 Gen1x1, 2.0, and 1.1 electrical specifications
  • Supports clock outputs from the internal BCK module
  • Real-time calibrations to ensure frequency accuracy
  • Data UI (unit interval) is well-controlled within ±500ppm during data transfer
  • Concise and explicit design structure to ease the IP integration

Block Diagram

USB2.0 build-in clock PHY, SMIC 55LL block diagram

Silicon Options

Foundry Node Process Maturity
SMIC 55nm LL —

Specifications

Identity

Part Number
USB2.0 build-in clock PHY, SMIC 55LL
Vendor
M31 Technology Corp.
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 2.0

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Single-Protocol PHY IP core

M31 Expands Rambus Collaboration, Strengthening Its One-Stop MIPI Subsystem Solution

This collaboration combines these controller capabilities with M31’s silicon-proven MIPI PHY portfolio with a strong track record of successful deployments, enabling M31 to offer a comprehensive MIPI subsystem solution integrating high-speed MIPI PHYs and MIPI CSI/DSI controllers to address the growing requirements of high-resolution imaging and display applications.

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026

Consolidated revenue for the first quarter reached NT$395 million, representing a year-over-year decrease of 9.2%. The decline was primarily attributable to timing fluctuations in contract signings for certain key advanced-node customers in North America, with the related revenue expected to be recognized in the second quarter.

Frequently asked questions about Single-Protocol PHY IP

What is USB2.0 build-in clock PHY, SMIC 55LL?

USB2.0 build-in clock PHY, SMIC 55LL is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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