Vendor: M31 Technology Corp. Category: Single-Protocol PHY

USB1.1 FS/LS PHY, TSMC 90EF

M31 provides customers with a unique USB 1.1 PHY IP for IoT applications.

Overview

M31 provides customers with a unique USB 1.1 PHY IP for IoT applications. The USB 1.1 PHY IP integrates a semi-digital PLL, which supports clock inputs as low as 32.768KHz. The USB 1.1 PHY IP not only supports standard USB 1.1 features, but also provides multiple clock outputs from 48MHz to 240MHz. It’s ideal for IOT or wearable devices that require basic USB functionalities.

Key features

  • Smallest USB1.1 PHY IP worldwide with PLL inside (<0.1mm²)
  • Fully compliant with Universal Serial Bus (USB) 1.1 electrical specification
  • Integrated PLL to provide a variety of stand-alone clock outputs

Specifications

Identity

Part Number
USB1.1 FS/LS PHY, TSMC 90EF
Vendor
M31 Technology Corp.
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 1.1

Provider

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Frequently asked questions about Single-Protocol PHY IP

What is USB1.1 FS/LS PHY, TSMC 90EF?

USB1.1 FS/LS PHY, TSMC 90EF is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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