Vendor: T2M GmbH Category: Single-Protocol PHY

USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC

A Universal Serial Bus (USB) transceiver is available for auxiliary devices.

USB 3.0 TSMC 16nm FFC In Production View all specifications

Overview

A Universal Serial Bus (USB) transceiver is available for auxiliary devices. The PHY meets with the specifications of USB 3.0 (USB SuperSpeed), USB 2.0 PIPE, and UTMI. Without sacrificing speed or data throughput, the USB3.0 PHY IP transceiver is made to use little power and occupy little space on the chip. To offer complete support for high-performance designs, the USB3.0 PHY IP comprises a full on-chip physical transceiver solution with Electrostatic Discharge (ESD) protection, a built-in self-test module with inbuilt jitter injection, and a dynamic equalization circuit. The USB3 MAC layer supports several IP sources across the common PHY interface (PIPE). Utilizing constant power, inbuilt Jitter Injection Output, built-in Self-Test, and authorized changing of analogue circuit characteristics, internal test monitoring and jitter is minimized.

Key features

  • Compliant with Universal Serial Bus 3.0 Specification
  • Supports 2.5GT/s and 5.0GT/s serial data transmission rate
  • Compliant with PIPE 3.0
  • Compliant with Universal Serial Bus 2.0 Specification
  • High-speed data transfer rate: 480 Mbps
  • Compliant with legacy USB 1.1
  • Full-speed data transfer rate: 12 Mbps
  • Compliant with UTMI 1.05 Specification
  • Operating Voltage: 1.1V and 3.3V
  • Support low jitter automatically calibrated oscillator for crystal-less mode
  • Support 125/250 MHz with 32/16-bit mode for USB 3.0
  • Support the Build-In-Self-Test (BIST) mode for low-cost TEG/ATE testing
  • Silicon Proven in TSMC 16FFC.

Block Diagram

USB 3.0 PHY IP in 16FFC block diagram

What’s Included?

  • GDSII & layer map
  • Place-Route views (.LEF)
  • Liberty library (.lib)
  • Verilog behavior model
  • Netlist & SDF timing
  • Layout guidelines, application notes
  • LVS/DRC verification reports

Silicon Options

Foundry Node Process Maturity
TSMC 16nm FFC In Production

Specifications

Identity

Part Number
USB 3.0 PHY IP in 16FFC
Vendor
T2M GmbH
Type
Silicon IP

Standards & Interfaces

Supported Standards
USB 3.0

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

T2M GmbH
HQ: Germany

Learn more about Single-Protocol PHY IP core

Frequently asked questions about Single-Protocol PHY IP

What is USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC?

USB 3.0 PHY IP, Silicon Proven in TSMC 16FFC is a Single-Protocol PHY IP core from T2M GmbH listed on Semi IP Hub. It is listed with support for tsmc In Production.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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