USB 2.0 Device Controller

The Universal Serial Bus Device controller (GRUSBDC) provides an interface between an USB 2.0 bus and an AMBA-AHB bus.

The core is used for implementing USB 2.0 functions providing access to the USB device through either an AHB slave or an AHB master interface.

USB data cargo is moved to the core’s internal buffers using a master or a slave data interface. The data slave interface allows access directly to the internal buffers using AHB transactions and therefore does not need external memory. This makes it suitable for slow and simple functions. The data master interface requires an additional AHB master interface through which data is transferred autonomously using descriptor based DMA. This is suitable for functions requiring large bandwidth.

These two interfaces are mutually exclusive and cannot be present in the same implementation of the core.

The core is used for implementing USB 2.0 functions providing access to the USB through either an AHB slave or an AHB master interface. The master interface is capable of higher bandwidths but is more complex and requires external memory. The slave interface is simpler and does not require external memory but is more bandwidth-limited. UTMI, UTMI+ and ULPI PHYs are supported.

Up to 16 IN and 16 OUT (maximum allowed by the USB 2.0 standard) endpoints can be supported and each can be individually configured for any of the four transfer types with any allowed maximum payload. There is a (technology-dependent) limit that restricts how many endpoints can use the maximum payload size but this limit is large enough not to cause any problems in practical cases.

Some notable features are support for Remote wakeup, soft-connect and scatter-gather DMA. The core has been FPGA proven and is also being used in ASIC projects.

• VHDL RTL Source code
• Synplify project file
• Synthesis scripts
• Stand-alone VHDL testbench
• User's manual
• Template design for LEON3 processor
• FPGA evaluation board(optional)
• Driver for Linux 2.6