UFS 3.1 Device
UFS 3.1 is the next specification update pending from JEDEC.
Overview
UFS 3.1 is the next specification update pending from JEDEC.
Arasan will offer UFS 3.1 compatible Host and Device Controllers in late Q2 2017 to select customers.
Key Differences between UFS 3.1 and UFS 2.1 are:
- Multiple RPMB regions with unique auth key, register a logical address
- Mandatory support for Gear3 5.8Gbps (M-PHY v3.x)
- Mandatory support for Gear4 11.6Gbps (M-PHY v4.x)
- Register Updates
- Adapt for HS-G4 added to the DME SET register
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about UFS Controller IP
What is UFS 3.1 Device?
UFS 3.1 Device is a UFS Controller IP core from Arasan Chip Systems Inc. listed on Semi IP Hub.
How should engineers evaluate this UFS Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UFS Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.