UFS 5.x Device IP

SmartDV’s UFS (Universal Flash Storage) 5.x Device IP is a next-generation storage interface solution designed for flash memory controllers and embedded storage subsystems in mobile, automotive, AI/ML, and high-performance embedded systems. Fully compliant with JEDEC UFS 5.0 specifications, MIPI M-PHY v6.0, and MIPI UniPro v3.0 standards, it enables seamless, high-throughput communication with UFS 5.0-compatible host controllers at up to 10.8 GB/s over dual M-PHY lanes. Engineered to meet the demands of next-generation AI-driven and storage-intensive applications, it delivers the performance and reliability modern devices require.

For flash memory controller teams, building UFS 5.0 device-side compliance from scratch represents significant engineering investment and risk. SmartDV’s UFS 5.x Device IP eliminates that burden, providing a complete, spec-accurate implementation that lets teams focus on product differentiation rather than protocol complexity.

Built for design flexibility and silicon efficiency, the IP core is highly configurable for both ASIC and FPGA implementations, with a strong focus on area optimization, power management, and peak performance. Its parameterized architecture and comprehensive documentation enable fast integration and confident design bring-up across a wide range of process nodes and target applications.

Compliance and Compatibility

• Fully compliant with JEDEC JESD220H (UFS 5.0); backward compatible with UFS 4.0, 3.1, 3.0, and 2.1
• Compliant with MIPI M-PHY v6.0, MIPI UniPro v3.0, and UFS HCI (JESD223G)
• Configurable SoC interface supporting AXI-4, APB, and custom wrappers for seamless integration
• Supports integration with third-party M-PHY and UniPro components
• Compatible with ASIC and FPGA design flows across leading foundry process nodes
• Compatible with all major EDA synthesis, simulation, and linting flows

• Full UFS 5.x Device Controller Support – Complete device-side HCI implementation per JESD223G with all UPIU types including Command, Data, Query, Task Management, and Response
• HS-Gear5 and HS-Gear6 Support – Ultra-high-speed, low-latency storage access via MIPI M-PHY v6.0 for maximum throughput
• Write Booster Support – Enhanced sequential write performance for demanding storage workloads
• Advanced Power Management – Deep Sleep, Auto Hibernate, and Performance Throttling for power-optimized operation
• Inline Cryptographic Hashing – SHA-256 and SHA-512 support for hardware-accelerated data security
• Comprehensive Partition Support – Multiple LUNs, Boot Partitions, RPMB, and Reliable Write for flexible storage management
• Secure Storage Operations – Purge, Erase, and Write Protection including Permanent and Power-On Write Protection