Vendor: True Circuits, Inc. Category: PLL

TSMC CLN40FLOD 40nm Ultra PLL - 15MHz-3000MHz

The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…

TSMC 40nm FLOD View all specifications

Overview

The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, features and ease of use. It is highly programmable so one PLL can be used for all applications on a SoC. It has ultra-low jitter performance (<500fs) for the most demanding SerDes and ADC reference clocks. It has ultra wide frequency range with multiplication factors over 250,000 to support reference clocks from 32KHz to 1GHz. It has precise frequency control with a least 26 fractional bits (at least 10 precise) for extremely high fractional-N resolution. It can generate precise and adjustable frequency spreading with programmable rate and depth to meet tight FCC requirements. It draws low power in a compact size.

Key features

  • New state-of-the-art architecture using high-speed digital and analog circuits that offers unprecedented operating ranges and extremely high performance.
  • Ultra low jitter performance for the most demanding SerDes and ADC reference clocks.
  • Ultra wide frequency range with multiplication factors over 250,000 to support 32KHz to 1GHz references.
  • Precise frequency control with a least 26 fractional bits (at least 10 precise) for extremely high fractional-N resolution.
  • Optional spread spectrum support with programmable rate and depth to meet tight FCC requirements.
  • Low power and compact size.
  • Highly programmable so one PLL can be used for all applications on a SoC.

What’s Included?

  • GDSII (100% DRC and LVS clean)- LVS Spice netlist- Verilog model- Synopsys synthesis model- LEF for clock generator PLL- User Guidelines including:
  • integration guidelines,
  • layout guidelines,
  • testability guidelines,
  • packaging guidelines,
  • board-level guidelines

Silicon Options

Foundry Node Process Maturity
TSMC 40nm FLOD

Specifications

Identity

Part Number
TCI-TN40FLOD-ULHPLL
Vendor
True Circuits, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about PLL IP core

Creating a Frequency Plan for a System using a PLL

How do you ensure that every part of a system receives the clock it needs—without wasting power or sacrificing performance? The answer lies in creating a well-structured frequency plan built around a PLL.

Specifying a PLL Part 3: Jitter Budgeting for Synthesis

This white paper is aimed at system architects and physical implementation leaders working on the design of SoCs. It can be confusing to understand the impact of different jitter sources and how to calculate a jitter budget when specifying a digital system. This white paper explains how jitter changes the period of a clock and how to ensure that jitter has correctly been accounted for in the calculations for timing closure.

Frequently asked questions about PLL IP cores

What is TSMC CLN40FLOD 40nm Ultra PLL - 15MHz-3000MHz?

TSMC CLN40FLOD 40nm Ultra PLL - 15MHz-3000MHz is a PLL IP core from True Circuits, Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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