Vendor: True Circuits, Inc. Category: PLL

TSMC CLN40FLOD 40nm Deskew PLL - 300MHz-1500MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.

TSMC 40nm FLOD View all specifications

Overview

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the clock reference by an integer between 1 and 4. It provides three 50% duty cycle skew aligned outputs that are divided down from the internal VCO frequency by 1, 2, and 4.

Key features

Designed to eliminate clock distribution latency in systems and individual chips.
Precisely aligns the clock distribution output with a reference clock.
Provides a zero-delay feedback divider and zero-skew divided clock outputs.

What’s Included?

GDSII (100% DRC and LVS clean)- LVS Spice netlist- Verilog model- Synopsys synthesis model- LEF for clock generator PLL- User Guidelines including:
integration guidelines,
layout guidelines,
testability guidelines,
packaging guidelines,
board-level guidelines

Silicon Options

Foundry	Node	Process	Maturity
TSMC	40nm	FLOD	—

Specifications

Identity

Part Number

TCI-TN40FLOD-DSHPLL

Vendor

True Circuits, Inc.

Type

Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

True Circuits, Inc.

HQ: USA

Frequently asked questions about PLL IP cores

What is TSMC CLN40FLOD 40nm Deskew PLL - 300MHz-1500MHz?

TSMC CLN40FLOD 40nm Deskew PLL - 300MHz-1500MHz is a PLL IP core from True Circuits, Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.