Vendor: True Circuits, Inc. Category: PLL

TSMC CLN40FL 40nm Ultra PLL - 15MHz-3000MHz

The Ultra PLL is designed with a architecture using high-speed digital and analog circuits that offers exceptional performance, f…

Overview

The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, features and ease of use. It is highly programmable so one PLL can be used for all applications on a SoC. It has ultra-low jitter performance (<500fs) for the most demanding SerDes and ADC reference clocks. It has ultra wide frequency range with multiplication factors over 250,000 to support reference clocks from 32KHz to 1GHz. It has precise frequency control with a least 26 fractional bits (at least 10 precise) for extremely high fractional-N resolution. It can generate precise and adjustable frequency spreading with programmable rate and depth to meet tight FCC requirements. It draws low power in a compact size.

Key features

  • New state-of-the-art architecture using high-speed digital and analog circuits that offers unprecedented operating ranges and extremely high performance.
  • Ultra low jitter performance for the most demanding SerDes and ADC reference clocks.
  • Ultra wide frequency range with multiplication factors over 250,000 to support 32KHz to 1GHz references.
  • Precise frequency control with a least 26 fractional bits (at least 10 precise) for extremely high fractional-N resolution.
  • Optional spread spectrum support with programmable rate and depth to meet tight FCC requirements.
  • Low power and compact size.
  • Highly programmable so one PLL can be used for all applications on a SoC.

What’s Included?

  • GDSII (100% DRC and LVS clean)- LVS Spice netlist- Verilog model- Synopsys synthesis model- LEF for clock generator PLL- User Guidelines including:
  • integration guidelines,
  • layout guidelines,
  • testability guidelines,
  • packaging guidelines,
  • board-level guidelines

Silicon Options

Foundry Node Process Maturity
TSMC 40nm FL —

Specifications

Identity

Part Number
TCI-TN40FL-ULHPLL
Vendor
True Circuits, Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about PLL IP core

True Circuits Announces the JSPICE™ Design Environment (JDE™) will be Offered to the JDE Ecosystem Open Source

True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) and developer of computer aided design (CAD) software announced today its intention to donate the JSPICE Design Environment (JDE) to form the foundation of a modern AMS development environment that unifies design generation, simulation, measurement, characterization, data analysis, and AI-assisted engineering into a single extensible environment.

True Circuits Introduces the Low-jitter Digital Ultra+ PLL at the Design Automation Conference

At the 62nd Design Automation Conference (DAC), True Circuits will introduce an improved, state-of-the-art digital LC PLL that includes an innovative digital control algorithm that cuts the lock time by as much as 70% over previous versions, while directly controlling the loop bandwidth accurately (by 0.1% of Fref or better) and consistently across PVT variations through continuous background loop-gain calibration.

Frequently asked questions about PLL IP cores

What is TSMC CLN40FL 40nm Ultra PLL - 15MHz-3000MHz?

TSMC CLN40FL 40nm Ultra PLL - 15MHz-3000MHz is a PLL IP core from True Circuits, Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this PLL?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PLL IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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