Vendor: Global UniChip Corp. (GUC) Category: Register File

TSMC CLN16FFC Ultra High Density One Port Register File

IGMSLRV01A is a synchronous SVT / LVT periphery ultra high density one port register file compiler.

TSMC 16nm FFC Silicon Proven View all specifications

Overview

IGMSLRV01A is a synchronous SVT / LVT periphery ultra high density one port register file compiler. It is developed with TSMC 16 nm 0.8 V/1.8 V CMOS LOGIC FinFET Compact Process. Different combinations of words, bits, and column-selected number (MUX) could be used to generate the most desirable configurations.
Given the desired size and timing constraints, the IGMSLRV01A compiler is capable of providing suitable synchronous SRAM instances models within minutes. It is capable of automatically generating the datasheets, Verilog behavioral simulation models, Place & Route (P & R) models, and test patterns for use in ASIC designs. The duty cycle length could be neglected as long as setup/hold time and minimum high/low pulse width requirements are satisfied. This allows a more flexible clock falling edge during each operation.

Key features

  • The Ultra High Density One Port Register File operates within voltage range from 0.72 V to 0.88 V and junction temperature range from -40 °C to 125 °C. The available supported macro size is configurable from 128 bits to 72K bits. The Compiler is divided into 3 groups according to their column selection numbers (Mux=1, 2 or 4).
  • Pins and metal layers
  • 1P4M (2Xa1Xd_h): 4 metal layers used and top metal is MXd.
  • Power mesh supported with M4 pins
  • Compilation options
  • MUX selection for the desired macro aspect ratio
  • Bit-write mask function (BWEB pin) that allows writing to designated bits in a word
  • Power management
  • Sleep mode powers down most of the peripheral circuits for leakage reduction with data retention.
  • Deep sleep mode powers down most of the peripheral circuits for leakage reduction and retains memory array content with lower voltage.
  • Shutdown mode achieves highest leakage reduction without data retention.
  • General features
  • High Current TSMC 6T 0.0864 um2 SRAM bit cell
  • Frequently used EDA model support
  • CPODE layer (206;32) used in layout design

Silicon Options

Foundry Node Process Maturity
TSMC 16nm FFC Silicon Proven

Specifications

Identity

Part Number
IGMSLRV01A
Vendor
Global UniChip Corp. (GUC)
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

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Frequently asked questions about Register File IP cores

What is TSMC CLN16FFC Ultra High Density One Port Register File?

TSMC CLN16FFC Ultra High Density One Port Register File is a Register File IP core from Global UniChip Corp. (GUC) listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Register File?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Register File IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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