Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Register File

SMIC 0.18um Single-Port/Two-Port Register File Compiler

SMIC 180nm G Silicon Proven View all specifications

Key features

  • SMIC 0.18um Logic 1P6M Salicide 1.8V/3.3V Process.
  • Ultra-High Density, High-speed, and Low-Power.
  • Fully Static Operation and Automatic Power Down.
  • Adaptive Self-time Delay for Fast Access Time.
  • Full Suite of Design Views and Models.

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G Silicon Proven

Specifications

Identity

Part Number
SMIC18-MC
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Provider

Learn more about Register File IP core

VeriSilicon and Google Jointly Launch Open-Source Coral NPU IP

The Coral NPU is built on the open RISC-V instruction set architecture, featuring native tensor processing capabilities, supporting mainstream machine learning frameworks such as JAX, PyTorch, and TensorFlow Lite (TFLite), and utilizing open-standard tools like Multi-Level Intermediate Representation (MLIR) from the Low Level Virtual Machine (LLVM) project for compiler infrastructure.

Frequently asked questions about Register File IP cores

What is SMIC 0.18um Single-Port/Two-Port Register File Compiler?

SMIC 0.18um Single-Port/Two-Port Register File Compiler is a Register File IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic Silicon Proven.

How should engineers evaluate this Register File?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Register File IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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