SATA Controller IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare SATA Controller IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
SATA 3 Host Controller on ARRIA V FPGA
The LDS SATA 3 HOST AR5GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA …
SATA Device Controller on Kintex 7
The LDS SATA 3 DEVICE XK7 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Kintex…
SATA Host Controller on Spartan 6 LXT FPGA
The LDS SATA HOST SP6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Spartan 6 FPGA.
SATA-IP core - File system management without CPU
SATA IP core compliant with the Serial ATA specification revision 3.0 and work on AMD UltraScale and 7-Series device.
The LDS SATA HOST STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA S…
SATA Host controller on Virtex 5 FXT
The LDS SATA HOST XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
Serial ATA Dual Host Controller
The LDS_SATA HOST DUAL XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
The LDS SATA HOST XV5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA.
LDS SATA RECORDER IP ON ARTIX 7
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IP
SATA HOST 3 ON KINTEX 7 Ultrascale
The LDS SATA 3 HOST XK7U IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Kintex 7 Ultrascale sp…
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IP
Virtex 7 GTX SATA 3 Host Controller
The LDS SATA 3 HOST XV7X IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 7 GTX speed gra…
The LDS SATA DEVICE XV6 IP incorporates the Command Layer, Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6…
The LDS SATA DEVICE STR4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA…
SATA HOST Controller on Cyclone IV GX
The LDS SATA HOST C4GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA Cyc…
SATA Device Controller on Altera Arria II GX
The LDS SATA DEVICE AR2GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA …
SATA Host on Altera Arria II GX
The LDS SATA HOST AR2GX IP incorporates the Transport layer, the Link layer, the PHY layer and the Rate Macth FIFO on a ALTERA AR…
SATA Host Controller on Virtex 6 LXT
The LDS SATA HOST XV6 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 6 FPGA.