Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: High-Speed

SMIC 0.18um SSTL_18 I/O

SSTL_18 (Stub Series Terminated Logic for 1.8v) is an electrical interface commonly used with DDR2.

SMIC 180nm G View all specifications

Overview

SSTL_18 (Stub Series Terminated Logic for 1.8v) is an electrical interface commonly used with DDR2.

Key features

  • Process: SMIC 0.18um Logic 1P6M Salicide 1.8v/3.3v process
  • I/O Supply voltage: 1.8v for output buffer, 1.8v for input buffer
  • Operation frequency: up to 400MHz (effective data rate at 800Mbits/S per pin)
  • 1.0ns data output time (typical) ; 0.5ns data input time (typical)
  • with adjustable On Die Termination (ODT) Resistor ( 50/75/150Ohm )
  • Off-Chip Driver (OCD) Calibration with programmable output impedance
  • 40um nominal pad pitch for stagger application
  • 2kv/200v typical HBM/MM ESD immunity

Silicon Options

Foundry Node Process Maturity
SMIC 180nm G —

Specifications

Identity

Part Number
SMIC18_SSTL18IO_01
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.
Type
Silicon IP

Provider

Learn more about High-Speed IP core

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Frequently asked questions about High-Speed I/O Pad IP

What is SMIC 0.18um SSTL_18 I/O?

SMIC 0.18um SSTL_18 I/O is a High-Speed IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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