Vendor: T2M GmbH Category: Single-Protocol PHY

Silicon Proven 1G Ethernet PHY IP as Whitebox

1G Ethernet PHY IP Core is available for licensing as a Whitebox IP, with unlimited usage and full modification rights granted to…

Overview

1G Ethernet PHY IP Core is available for licensing as a Whitebox IP, with unlimited usage and full modification rights granted to the customer, ensuring a high level of flexibility with the deliverables.

The GbE PHY IP for Giga 10/100/1000 Ethernet applications is a highly integrated solution including the Twisted Pair Physical Medium Dependent Sub-layer (TP-PMD, 100BASE-TX only), Physical Coding Sub-layer (PCS), and Physical Medium Attachment Layer (PMA). It supports 10BASE-T, 100BASE-TX, and 1000BASE-T protocols with a very low power consumption and area. The Media Access Control Layer (MAC) is connected to this GPHY via GMII (Giga Media Independent Interface) or via RGMII. It supports Unshielded Twisted Pair Category 5 Cable (UTP5), or UTP5/UTP3 cable. The Gigabit physical layer function is defined by IEEE 802.3ab and IEEE 802.3u.

Key features

  • IEEE 802.3-2008, IEEE 802.3az fully standards compliant
  • IEEE 1588-2008 support
  • BroadR-Reach™ support
  • Dual port MAC interface:
  • GMII (10/100/1000BASE-T)
  • MII (10/100BASE-T)
  • Auto-negotiation support
  • Automatic detection and correction of pair swaps (Auto-MDIX), pair skew and pair polarity
  • 6 different operating modes:
  • 1000BASE-T Full Duplex and Half Duplex
  • 100BASE-TX Full Duplex and Half Duplex
  • 10BASE-T Full Duplex and Half Duplex
  • Management interface
  • Baseline wander compensation
  • On-chip transmit wave-shaping
  • On-chip hybrid circuit
  • 10KB jumbo frames
  • Internal, external and remote loop back
  • Hardware configuration for default operation
  • Power down mode, interrupt support
  • IEEE 1500 support for SoC testing integration
  • LED indication: link mode, status, speed, activity and collision
  • Extracted from Production Chipset

Block Diagram

1G Ethernet Whitebox PHY IP block diagram

What’s Included?

  • Detailed Datasheet
  • Verilog behaviour model (A) for simulation
  • Liberty (db./.lib) for synthesis, STA, and equivalence checking
  • CTL / CTLDB for DFT
  • SPF (Standard Test Interface Language (STIL) Procedure File) for ATPG
  • LEF for APR
  • CDL for LVS connection

Specifications

Identity

Part Number
1G Ethernet Whitebox PHY IP
Vendor
T2M GmbH
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

T2M GmbH
HQ: Germany

Learn more about Single-Protocol PHY IP core

Frequently asked questions about Single-Protocol PHY IP

What is Silicon Proven 1G Ethernet PHY IP as Whitebox?

Silicon Proven 1G Ethernet PHY IP as Whitebox is a Single-Protocol PHY IP core from T2M GmbH listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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