The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant …
- Root Of Trust
- In production
- Now
- FIPS 140-2 Compliant
The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant …
Programmable Root of Trust with Quantum Safe Cryptography acceleration
The CryptoManager RT-6xx v3 Root of Trust family is the latest generation of fully programmable FIPS 140-3 compliant hardware sec…
Compact High-Speed 32-bit CPU for Real-time and Linux Applications
AndesCore™ A25 is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of …
Compact High-Speed 64-bit CPU for Real-time and Linux Applications
AndesCore™ AX25 is a compact 64-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is ta…
Multi-world Hardware Isolation System IP for System Security
Delivers advanced execution environment capabilities and hardware-enforced isolation to RISC-V systems
The SiFive® Performance™ P570 Gen 3 brings fully out-of-order support coupled with support for the most comprehensive set of RVA2…
RISC-V-Based, Open Source AI Accelerator for the Edge
Coral NPU is a machine learning (ML) accelerator core designed for energy-efficient AI at the edge.
32-Bit & 64-Bit High Performance Processor - 9-Stage Pipeline, Dual-issue
900 Series processors include four different classes: N900 (32 bit), U900 (32 bit + MMU), NX900 (64 bit) and UX900 (64 bit + MMU).
32-Bit Low Power Processor - 2-Stage Pipeline, Single-issue
N200 Series is designed for deeply embedded application with low power and area consumption.
RVA23, Multi-cluster, Hypervisor and Android
AndesCore™ AX66 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on An…
Root of Trust IP is a Hardware Secure Module (HSM) solution that provides the security foundation for processors and System on Ch…
32-bit Multiprocessors with Level-2 Cache-Coherence
AndesCore™ A45MP 32-bit multicore CPU IP is an 8-stage superscalar processor based on AndeStar™ V5 architecture.
Hierarchical scalability is the foundation principle of the Fibonacci machine-learning (ML) system-on-chip (SoC).
Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security co…
AI inference engine for real-time edge intelligence
Today’s robots specialize in narrowly defined tasks, built for simple automation of repetitive behavior.
SoC Security Platform / Hardware Root of Trust
GEON-SoC is an area-efficient, processor-agnostic, hardware root of trust for SoC designs.
The FPU Verification IP provides an effective & efficient way to verify the components interfacing with FPU interface with a RISC…
Programmable Root of Trust With DPA and FIA for US Defense
The Rambus Root of Trust RT-1660 is a fully programmable, FIPS 140-3 compliant root-of-security core offering security by design …
The ARC-V™ RPX-100 series processors feature a dual-issue, 64-bit superscalar architecture for use in high performance applicatio…
The ARC-V™ RHX-100 series processors feature a dual-issue, 32-bit superscalar architecture for use in applications where real-tim…