AMBA 5 CHI IP
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AMBA 5 CHI Verification IP
- VIP is Compliant with the latest ARM™ AMBA5 CHI.
- Support any type of network topology like Crossbar, Ring, Mesh, etc…
- Support for all types of AMBA5 CHI Nodes:
- Requester (RN-F, RN-D, RN-I)
- Home (HN-F, HN-I)
- Subordinate (SN-F, SN-I)
- Requester (RN-F, RN-D, RN-I)
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AMBA 5 CHI Verification IP
- Compliant with the latest ARM AMBA 5 CHI specification (CHI-D).
- Supports CHI Master, Slave, Interconnect, Monitor and Checker.
- Support for Protocol, Network and Link layer communication, including flow control mechanisms across RN2HN and HN2SN links.
- Supports all CHI protocol node types:
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AMBA 5 CHI Synthesizable Transactor
- Compliant with the latest ARM AMBA 5 CHI specification (CHI-B).
- Supports CHI Master, Slave, Interconnect.
- Support for Protocol, Network and Link layer communication, including flow control mechanisms across RN2HN and HN2SN links.
- Supports all CHI protocol node types:
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AMBA 5 CHI Assertion IP
- Specification Compliance
- Compliant with the latest ARM AMBA 5 CHI specification.
- Supports all ARM AMBA 5 CHI data widths.
- Supports for Protocol, Network and Link layer communication, including flow control mechanisms across RN2HN and HN2SN links.
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Simulation VIP for AMBA CHI
- Support testbench language interfaces for SystemVerilog, UVM, OVM, e, and SystemC
- Generates constrained-random bus traffic with predefined error injection
- Callbacks access at multiple queue points for scoreboarding and data manipulation
- Provides comprehensive checking and coverage model
