AMBA CHI IP Listing

The I2C Interface provides full support for the two-wire I2C synchronous serial interface, compatible with the ACCESS.

• I2C / I3C

Streamline Ventana technology integration into high-performance systems, fully leveraging third-party IP, while applying RISC-V s…

• RISC-V

Designed to be integrated in secure MCUs (microcontrollers), the RT-260 Root of Trust (formerly VaultIP) is a FIPS 140-3 CMVP com…

• Root Of Trust
• In Production
• Now
• FIPS 140-2 CMVP

Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-130 Root of Trust (formerly VaultIP) is a SESIP, P…

• Root Of Trust
• Silicon Proven
• Now
• FIPS 140-2 CMVP

Designed to be integrated in power and space-constrained SoCs or FPGAs, the RT-120 Root of Trust (formerly VaultIP) is a FIPS 140…

• Root Of Trust
• In Production
• Now
• FIPS 140-2 CMVP

D100 Series is the ultimate multi-format, multi-stream real-time hardware decoder IP core, for all semiconductor manufacturers lo…

• Video Processing
• Available

The ColdFire V4 Core & Standard Product Platform (SPP) C1 (CFV4SPPC1) combines the ColdFire V4 Core with industry proven platform…

• CPU

The ColdFire V4 Core & Standard Product Platform (CFV4SPP) combines the ColdFire V4 Core with industry-proven platform peripheral…

• CPU
• Silicon Proven
• Now

The ColdFire V4 Core & Standard Product Platform (SPP) C2 (CFV4SPPC2) combines the ColdFire V4 Core with industry proven platform…

• CPU
• Silicon Proven
• Now

The AL-D105 is a multi-format, multi-stream, video decoder IP core, capable of decoding 12 different video formats up to H.264/AV…

• Video Processing
• Available

The Serial Peripheral Interface or SPI-bus is a simple 4- wire serial communications interface used by many peripheral chips that…

• SPI / QSPI XSPI

The PKA-IP-28 is a family of Public Key Accelerator IP cores designed for full scalability and an optimal “performance over gate …

• RSA

The RapidIO™ is a packet - switched interconnect intended primarily as an intra - system interfaces for a chip-to-chip and board-…

• RapidIO
• now
• Fully Compliant with Rapid …

The DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…

• Controller
• DDR5

The DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…

• Controller
• DDR4 + 1

The DDR5/4 Controller is a next-generation memory controller optimized for latency, bandwidth, and area, supporting JEDEC standar…

• Controller
• DDR4 + 1

The Veriest AMBA AXI Data Prefetch Buffer Design IP provides a mechanism read / prefetch contiguous data over the AXI from a memo…

• Protocol Bridge
• Fully Verified
• Now
• AMBA 3

The Veriest AMBA AXI Data Writer Speader Design IP provides a mechanism to write data over the AXI to a memory such as DDR SDRAM …

• Protocol Bridge
• Fully Verified
• Now
• AMBA 3

The Veriest AMBA AHB Simple Master Bridge Design IP provides a bridge between the embedded AMBA AHB bus master and a simplified g…

• Protocol Bridge
• Fully Verified
• Now
• AMBA 3

The Veriest AMBA AHB Slave Bridge Design IP offers a simple solution to provide a bridge between the embedded AMBA AHB bus and a …

• Protocol Bridge
• Fully Verified
• Now
• AMBA 3