Two Dollars and a Test Suite
The Arm-Qualcomm verdict made headlines for its $2 award. The finding that matters more is about who controls the compliance tests a custom chip must pass before it can ship.
Vendor:
Veriest Solutions Ltd.
Category:
Protocol Bridge
AMBA AHB Simple Master Bridge
The Veriest AMBA AHB Simple Master Bridge Design IP provides a bridge between the embedded AMBA AHB bus master and a simplified g…
Overview
The Veriest AMBA AHB Simple Master Bridge Design IP provides a bridge between the embedded AMBA AHB bus master and a simplified generic local bus. The Veriest AMBA AHB Simple Master Bridge is ideal for IP developers to adapt IP internal busses to the AMBA AHB bus for DMA and other bus master requirements. The local interface consists of request and response channels.
Key features
- Easy integraton
- AMBA AHB 3.0 Compatible
- AHB Reads, Writes
- Burst Types: Single only
- Transfer size 32-bit aligned only
- Configurable address bus width (32-bit / 64-bit)
- Configurable data bus width (32-bit / 64-bit / 128-bit)
- Low latency
Block Diagram
VV1600 block diagram
Benefits
- Low Gate Count
- Low Power Consumption
- Fully Verified
- Spyglass Lint Validated
- Standards Compliant
Applications
- General System on Chip Use
What’s Included?
- Synthesizable Verilog RTL
- Verilog test bench and test cases
- Detailed block diagram and technical documents
Specifications
Identity
Part Number
VV1600
Vendor
Veriest Solutions Ltd.
Type
Silicon IP
Provider
HQ:
Israel
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Frequently asked questions about Protocol Bridge IP cores
What is AMBA AHB Simple Master Bridge?
AMBA AHB Simple Master Bridge is a Protocol Bridge IP core from Veriest Solutions Ltd. listed on Semi IP Hub.
How should engineers evaluate this Protocol Bridge?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.