SATA/SAS 3.0 transceiver IP with PMA and PCS layer
With sophisticated architecture and technology, the SATA/SAS transceiver IP with PMA and PCS layer is designed for low power and …
Overview
With sophisticated architecture and advanced technology, the SATA/SAS transceiver IP with PMA and PCS layer is designed for low power and high performance application. It is highly configurable and can be tightly integrated with the user logic or SOC resources; it can support SATA protocol with data rate 1.5/3/6Gbps, and SAS protocol with data rate 1.5/3/6/12Gbps.
Key features
- Highly customizable PMA configuration (controlled by PCS), X4 per Quad
- Support SATA data rate 1.5/3/6Gbps
- Support SAS data rate 1.5/3/6/12Gbps
- Digitally-control-impedance termination resistors
- Built-in TX equalization and RX CTLE
- RX Built-in Decision Feedback Equalization
- Built-in Eye Opening Monitor
- PRBS (PRBS-7/PRBS-15/PRBS-23/PRBS-31) generator and checker
- Multiple Loop Back
- Support Non-SSC, center-spread and down-spread SSC
- Supports SATA OOB signaling
- Support IEEE 1149.1 and 1149.6(AC JTAG) boundary scan
- Built-in self-test(BIST) features for production
- Advanced, built-in diagnostics including on-chip eye monitor
- Independent QPLL at common for clock flexibility
- Supports flip-chip package
- Low Power Consumption
Block Diagram
What’s Included?
- GDSII&CDL Netlist
- Verilog Model
- LEF Layout Abstract(.LEF)
- Liberty Timing Models(.lib)
- Verify Results
- Specification
- Datasheet
- Integration Guideline
- Evaluation Plan
- Leading support for package design, SI&PI modeling and production test development
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Single-Protocol PHY IP
What is SATA/SAS 3.0 transceiver IP with PMA and PCS layer?
SATA/SAS 3.0 transceiver IP with PMA and PCS layer is a Single-Protocol PHY IP core from KNiulink Semiconductor Ltd. listed on Semi IP Hub.
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.