Vendor: M31 Technology Corp. Category: Single-Protocol PHY

ONFI IO v5.0, 2.4GT/s, TSMC 12FFC, 1.2V, N/S orientation, H&V cell

ONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage appli…

TSMC 12nm FFC View all specifications

Overview

ONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage applications. M31 provides a silicon-proven ONFI I/O in a variety of process nodes, which complies with international Open NAND Flash Interface specification, providing on-die termination (ODT) and supporting ZQ impedance calibration, and can be customized based on customer specifications. The ONFI 6.0, ONFI 5.1, and ONFI 5.0 I/O IP have been silicon-proven at advanced FinFet nodes. In addition, M31 also provides solutions for signal integrity (SI) issues such as FFE and DFE.

Key features

  • Supports ONFI 6.0(4.8Gbps), ONFI 5.1(3.6Gbps), ONFI 5.0(2.4Gbps), ONFI 4.1(1.2Gbps), ONFI 4.0(800Mbps) & ONFI 3.2(533Mbps)
  • Power-sequence free
  • Provides multi-driving-strength selection
  • Provides CTT mode and LTT mode
  • Provides two receivers (Schmitt trigger and LVCMOS receiver) in a cell, which can be selected by the register.
  • Provides ODT (On-Die Termination)
  • Provides ZQ Calibration

Block Diagram

ONFI IO v5.0, 2.4GT/s, TSMC 12FFC, 1.2V, N/S orientation, H&V cell block diagram

Silicon Options

Foundry Node Process Maturity
TSMC 12nm FFC —

Specifications

Identity

Part Number
ONFI IO v5.0, 2.4GT/s, TSMC 12FFC, 1.2V, N/S orientation, H&V cell
Vendor
M31 Technology Corp.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Single-Protocol PHY IP core

M31 High-Speed and Long-Channel MIPI C/D-PHY Solution on TSMC N3P/N3C

With the rapid growth of AR/VR and high-resolution imaging systems such as drones and action cameras, MIPI CSI (Camera Serial Interface) and MIPI DSI (Display Serial Interface) require both high data throughput and low power consumption. M31 provides a MIPI C-PHY and D-PHY IP combo solution implemented on TSMC N3P and N3C processes.

High-Speed PCIe and SSD Development and Challenges

PCIe stands for Peripheral Component Interconnect Express (PCIe), which is a very important specification in computer buses. It is widely used in a large number of applications for data exchange communication within computer components, such as network cards, graphics cards, and nowadays NVMe solid state drives, which are mostly connected to the motherboard via PCIe. Since its introduction in 2003, PCIe has evolved into a fifth or even sixth-generation specification.

Mastering Key Technologies to Realize the Dream - M31 IP Integration Services

Throughout the development of the industry, the evolution of advanced semiconductor manufacturing processes has led to an increase in production costs, high-speed interface bandwidth, and the difficulty and risk in IP and SoC integration. That results in a significant increase in development costs for chip manufacturers, especially in the investment of manpower, and EDA tools are becoming more challenging.

M31 on the Specification and Development of MIPI Physical Layer

MIPI is the abbreviation of "Mobile Industry Processor Interface". This article will introduce the physical layer specifications of MIPI architecture, and explain the features and benefits of D-PHY and C-PHY respectively. Then, the MIPI perspective on the development and challenges of automotive electronics and the professional MIPI technical services that M31 can provide will be shared.

Frequently asked questions about Single-Protocol PHY IP

What is ONFI IO v5.0, 2.4GT/s, TSMC 12FFC, 1.2V, N/S orientation, H&V cell?

ONFI IO v5.0, 2.4GT/s, TSMC 12FFC, 1.2V, N/S orientation, H&V cell is a Single-Protocol PHY IP core from M31 Technology Corp. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP