Vendor: Nano Silicon Category: Single-Protocol PHY

Mini LVDS Transmitter

Mini LVDS Transmitter

Key features

  • Selectable dual operation modes:
    • 2-link mode: 6 data channels and 1 clock channel per link
    • 4-link mode: 3 data channels and 1 clock channel per link
  • Output offset voltage selectable from 0.8 – 1.5 V
  • Output swing selectable from 200 – 500 mV
  • Pre-emphasis selectable from 0 – 6 dB
  • Power-down mode
  • Self-testing mode
  • PLL requires no external components

Silicon Options

Foundry Node Process Maturity
SMIC 40nm 40nm 400 nm

Specifications

Identity

Part Number
MINI_LVDS_TX
Vendor
Nano Silicon
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Australia

Frequently asked questions about Single-Protocol PHY IP

What is Mini LVDS Transmitter?

Mini LVDS Transmitter is a Single-Protocol PHY IP core from Nano Silicon listed on Semi IP Hub. It is listed with support for smic.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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