What is LVDS Receiver?
LVDS Receiver is a Single-Protocol PHY IP core from Nano Silicon listed on Semi IP Hub. It is listed with support for smic.
Vendor:
Nano Silicon
Category:
Single-Protocol PHY
LVDS Receiver
Key features
- Wide frequency range:
- Input: 20 – 150 MHz
- Output: 20 – 150 MHz
- Power-Down Mode
- Supports VGA, SVGA, XGA, SXGA, SXGA+ and QXGA
- Up to 10.5 Gbit/s bandwidth
- PLL requires no external components
- 8- or 10-bit mode
Block Diagram
LVDS_RX block diagram
Applications
- LCD Displays
- Laptop PC
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| SMIC | 40nm | 40nm 400 nm | — |
Specifications
Identity
Part Number
LVDS_RX
Vendor
Nano Silicon
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Australia
Frequently asked questions about Single-Protocol PHY IP
How should engineers evaluate this Single-Protocol PHY?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.