Vendor: Xilinx, Inc. Category: Debug Trace

LogiCore AXI Exerciser

Included at no additional charge with ISE™ Embedded, System Edition software Xilinx provides AXI Exerciser IP which as AXI Master…

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Overview

Included at no additional charge with ISE™ Embedded, System Edition software

Xilinx provides AXI Exerciser IP which as AXI Master can generate AXI4 traffic for various modules/interconnect connected in system.

The Xilinx LogiCORE™ IP Advanced eXtensible Interface (AXI) exerciser is a core that stresses the AXI4 interconnect and other AXI4 peripherals in the system. It generates a wide variety of AXI4 transactions based on the core programming.

Key features

  • AXI4 interface to program core for different traffic generation options
  • Works as a master to issue read/write commands based on the programming sequence to CMDRAM
  • Flexible data width capability (32-bit 64-bit) on Slave and Master AXI4 interface
  • Interrupt pin indicating core completed generation of traffic
  • Error interrupt pin indicating error occurred during core operation. Error registers can be read to understand the error occurred

Specifications

Identity

Part Number
LogiCore AXI Exerciser
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

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Frequently asked questions about Debug Trace IP

What is LogiCore AXI Exerciser?

LogiCore AXI Exerciser is a Debug Trace IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Debug Trace?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Debug Trace IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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