LCD Display controller

The Display controller (DISP) provides a parallel digital RGB (red, green, blue) and signals for horizontal, vertical synchronization, pixel clock and data enable as output to interface directly to a variety of LCD and TFT panels.

The controller supports multiple data formats, and adapts to RGB or BGR. The user can configure the pixel clock frequency according to the screen resolution and frame rate. DISP has four interrupt signals to indicate the current working status.

The dithering pseudo-random technique is used to add a small random value (threshold) to each pixel color channel (R, G or B) value, To adapt to panels with a bit width lower than 24bits.

• 24-bit RGB or 20-bit BT1120 parallel pixel output; 8 bits-per-pixel (RGB888)
• 1 display FIFO (32x24-bit)
• Color look-up table (CLUT) up to 256 color (256x24-bit) per layer
• Programmable timings for different display panels (Refer to :ref:Synchronou_timing)
• Programmable background color
• Programmable polarity for HSYNC, VSYNC and data enable
• Up to 8 input color formats selectable per layer
  • ARGB8888
  • RGB888
  • RGB565
  • ARGB1555
  • ARGB4444
  • L8 (8-bit luminance or CLUT)
  • AL44 (4-bit alpha + 4-bit luminance)
  • AL88 (8-bit alpha + 8-bit luminance)
• Pseudo-random dithering output for low bits per channel
  • Dither width 2-bits for red, green, blue
  • Dither width 3-bits for red, blue
• Flexible blending between two layers using alpha value (per pixel or constant)
• Color keying (transparency color)
• Programmable window position and size
• Supports thin film transistor (TFT) color displays
• Up to 4 programmable interrupt events