SPI/BOSCH Verification IP provides an smart way to verify the serial synchronous communication protocol.The SmartDV's SPI/BOSCH V…
- Verification IP
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
SPI/BOSCH Verification IP provides an smart way to verify the serial synchronous communication protocol.The SmartDV's SPI/BOSCH V…
SPI (Serial Peripheral Interface) Verification IP
SPI (Serial Peripheral Interface) is the serial synchronous communication protocol developed by SPI Block Guide V04.01.
SPDIF (IEC60958) Verification IP
SPDIF Verification IP provides an smart way to verify the SPDIF component of a SOC or a ASIC.
The SpaceWire Verification IP is compliant with ECSS-E-ST-50-12C specification and verifies SpaceWire interfaces.
The SpaceFibre Verification IP is compliant with ECSS Draft F3 specification and verifies SpaceFibre interfaces.
SMPTE Serial Data Interface (SDI) Verification IP
SMPTE SDI Verification IP is fully compliant with SMPTE SDI Specification.
SMBus Verification IP provides an smart way to verify the SMBus bi-directional two-wire bus.
SLVS-EC is a high-speed serial communication protocol developed by Japan Industrial Imaging Association Standard to support the v…
The SmartDV's SIM Card Verification IP is fully compliant with Version ETSI-TS-100-977-V8.14.0 SIM Card Specification and verifie…
SGPIO (Serial GPIO) Bus Verification IP provides an smart way to verify the SGPIO bus.
Serial Front Panel Data Port (SFPDP) Verification IP
Serial Front Panel Data Port (SFPDP) is a high-speed low-latency data-streaming serial communications protocol for use in high-sp…
Serial Flash is the serial synchronous communication protocol based Flash VIP, supporting all major Serial Flash vendors.
SDI Verification IP implements the digital transmision systems as specified in Serial-Digital Interface standard for microprocess…
Safe-By-Wire Plus Verification IP
Safe-By-Wire Plus (SBWP) Verification IP is an solution in the market for the verification of Safe-By-Wire Plus (SBWP) two-wire s…
SAS Verification IP provides an smart way to verify the SAS bi-directional bus.
SafeSPI is the serial synchronous communication protocol based Flash VIP, supporting all major SafeSPI vendors.
SENT (SAE J2716) Verification IP
Single Edge Nibble Transmission (SENT) is a single-wire, serial unidirectional communication protocol.
SAE_J1850 Verification IP provides an smart way to verify the SAE_J1850 component of a SOC or a ASIC.The SmartDV's SAE_J1850 Veri…
RoE Verification IP is compliant with IEEE 1914.3-2018 for Radio over Ethernet Encapsulations and Mappings and IEEE 802.3 Specifi…
RoCE Verification IP is compliant with InfiniBandTM Architecture Specification Volume 1 Release 1.2.1 for RDMA Over Converged Eth…