UMC 40nm LP Dual Port SRAM compiler with Sleep/Retention mode
Faraday Technology
•
HQ:
Taiwan
UMC 40nm LP Dual Port SRAM compiler with Sleep/Retention mode
- UMC
- 40nm
- LP
- Pre-Silicon
Compare 2,955 UMC IP Cores from 31 vendors
-
-
UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy
- UMC
- 40nm
- LP
- Pre-Silicon
-
UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy and LVT peripheral
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy and LVT peripheral
- UMC
- 40nm
- LP
- Pre-Silicon
-
UMC 40nm LP Logic Process Dual-Port SRAM Memory Compiler with LVT peripheral
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process Dual-Port SRAM Memory Compiler with LVT peripheral
- UMC
- 40nm
- LP
- Pre-Silicon
-
40LP High density dual port SRAM compiler with Vss booster feature
Faraday Technology• HQ: Taiwan40LP High density dual port SRAM compiler with Vss booster feature
- UMC
- 40nm
- LP
- Pre-Silicon
-
Faraday Technology• HQ: Taiwan
UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral
- UMC
- 40nm
- LP
- Silicon Proven
-
UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT
Faraday Technology• HQ: TaiwanUMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT
- UMC
- 40nm
- LP
- Silicon Proven
-
UMC 28nm HPC process Dual Port SRAM with row reapir
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM with row reapir
- UMC
- 28nm
- HPC
-
UMC 28nm HPC process Dual Port SRAM with row repair & LVT
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM with row repair & LVT
- UMC
- 28nm
- HPC
-
UMC 28nm HPC process Dual Port SRAM with LVT
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM with LVT
- UMC
- 28nm
- HPC
-
UMC 28nm HPC process Dual Port SRAM compiler
Faraday Technology• HQ: TaiwanUMC 28nm HPC process Dual Port SRAM compiler
- UMC
- 28nm
- HPC
-
UMC 40nm Low Power Process , Two Port Register File with dual power rail
Faraday Technology• HQ: TaiwanUMC 40nm Low Power Process , Two Port Register File with dual power rail
- UMC
- 40nm
-
UMC 55nm ULP/LowK Process Single-Port SRAM with well bias & RED Memory Compiler
Faraday Technology• HQ: TaiwanUMC 55nm ULP/LowK Process Single-Port SRAM with well bias & RED Memory Compiler
- UMC
- 55nm
- ULP
-
UMC 55nm ULP/LowK Single-Port SRAM with Well Bias uHVT
Faraday Technology• HQ: TaiwanUMC 55nm ULP/LowK Single-Port SRAM with Well Bias uHVT
- UMC
- 55nm
- ULP
-
UMC 55nm ULP/LowK Process Single-Port SRAM with RED Well Biase Memory compiler
Faraday Technology• HQ: TaiwanUMC 55nm ULP/LowK Process Single-Port SRAM with RED Well Biase Memory compiler
- UMC
- 55nm
- ULP
-
UMC 55nm ULP/LowK Process Single-Port SRAM with well bias HVT Memory Compiler
Faraday Technology• HQ: TaiwanUMC 55nm ULP/LowK Process Single-Port SRAM with well bias HVT Memory Compiler
- UMC
- 55nm
- ULP
-
UMC 55nm ULP/LowK process Single-Port SRAM
Faraday Technology• HQ: TaiwanUMC 55nm ULP/LowK process Single-Port SRAM
- UMC
- 55nm
- ULP
- Pre-Silicon
-
Faraday Technology• HQ: Taiwan
UMC 55nm eFlash process synchronous low power feature RVT peripheral high density single port SRAM compiler with row redundancy.
- UMC
- 55nm
- Pre-Silicon
-
Faraday Technology• HQ: Taiwan
UMC 55nm eFlash process process synchronous low power feature RVT peripheral high density single port SRAM compiler.
- UMC
- 55nm
- Pre-Silicon
-
UMC 55nm eHV process ; Single-Port SRAM compiler with Row redundancy
Faraday Technology• HQ: TaiwanUMC 55nm eHV process ; Single-Port SRAM compiler with Row redundancy
- UMC
- 55nm
- Pre-Silicon