Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Logic process 7-Track Generic Core Cell Library.
- UMC
- 55nm
- SP
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Logic process 7-Track Mini Cell Library.
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 7-Track Mini-Library.
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Cell Library with LPLUS (C38 RVT).
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track Cell Library with LMINUS (C30 RVT).
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library wtih LPLUS (C38).
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track Cell Library with LMINUS (C30 LVT).
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library with LPLUS (C38).
Standard Cell (MiniLib) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library.
Standard Cell (MiniLib) Library IP, 6 tracks, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash/EE2PROM AL process Mini-Library+ (6-Track) Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um LL process
UMC 0.18um MM/RF process Mini Cell Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um LL process
UMC 0.18um MM/RF process Mini Cell Library.
Standard Cell (MiniLib) Library IP, 7 tracks, UMC 0.18um G2 process
UMC 0.18um GII Logic process high-density/Low Power Core Cell Library.