Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Enhancement) Logic Process
- UMC
- 110nm
- HS
Interface and connectivity IP cores enable communication between components, chips, and systems in modern SoC and ASIC designs.
These IP cores implement a wide range of communication standards including high-speed serial interfaces, on-chip interconnects, chiplet and die-to-die links, and low-speed control interfaces.
This catalog allows you to explore and compare connectivity IP cores from leading vendors based on bandwidth, latency, protocol support, and process node compatibility.
Whether you are designing high-performance computing systems, data center processors, automotive platforms, or embedded systems, you can find the right interface IP for your communication requirements.
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
Low power LVDS Receiver 800Mbps; UMC 0.11um HS/AE (AL Enhancement) Logic Process
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
Voltage mode 10/100 Base-TX/FX Energy Efficient Ethernet PHY; Support EtherCAT and cable diagnostic; UMC 0.11um HS/AE Logic Proce…
10BASE-T/100BASE-TX/100BASE-FX/1000BASE-T Gigabit Energy Efficient Ethernet PHY; UMC 28nm HPC+/LOW_K process
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
XTAL LESS for USB3.0 ; UMC 40nm LP/RVT Logic Process
XTAL LESS for USB3.0 ; UMC 40nm LP/RVT Logic Process
USB 2.0 Device PHY IP, UMC 0.11um eFlash process
UMC 0.11um eFlash Process , USB 2.0 OTG PHY
MIPI M-PHY IP, UMC 40nm LP process
MIPI MPHY 6Gbps/lane, UMC 40nm LP Low-K process.
LVDS RX, UMC 40nm LP/RVT Low-K Logic process.
10/100 Ethernet PHY IP, UMC 0.18um MS process
10/100 Base-TX Fast Ethernet PHY, UMC 0.18um MMC process.
10/100 Ethernet PHY IP, UMC 0.13um HS/FSG process
10/100 Base-TX Fast Ethernet PHY, UMC 0.13um HS/FSG Logic process.
USB 3.0 OTG PHY IP, UMC 40nm LP process
USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process.
USB 3.0 Device PHY IP, Non-Crystal mode support, UMC 40nm LP process
Crystal-less USB 3.0 PHY, UMC 40nm Logic/Mixed-Mode Low Power/RVT+LVT process.
USB 2.0 OTG PHY IP, UMC 55nm eFlash process
USB2.0 OTG PHY, UMC 55nm eFlash process.
USB 2.0 OTG PHY IP, UMC 40nm LP process
OTG USB2.0 UMC 40 nm LP/RVT process.
USB 2.0 OTG PHY IP, UMC 0.25um process
USB 2.0 host On-The-Go PHY, UMC 0.25um Logic process.
USB 2.0 OTG PHY IP, UMC 0.18um G2 process
USB 2.0 On-The-Go PHY, UMC 0.18um GII Logic RVT/FSG process.
USB 2.0 OTG PHY IP, UMC 0.13um HS/FSG process
USB 2.0 On-The-Go PHY, UMC 0.13um HS/FSG Logic process.