Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler.
- UMC
- 55nm
- SP
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT.
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler.
Single Port SRAM Compiler IP, HVT, Support Repair Features, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor Single Port SRAM with peripheral HVT and row redundancy.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler with redundancy feature.
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55nm eHV Low Power Low-K process synchronous high density, Single Port SRAM compiler with row redundancy option.
Single Port SRAM Compiler IP, Support Repair Features, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM memory compiler with row Redundancy.
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303RVT cell peripheral LVT.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler LVT with row redundancy.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM memory compiler with row redundancy.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler with LVT peripheral.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/HVT Logic process with 6TSRAM (0.242 mm2) Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm LP Logic process Ultra high speed Single Port SRAM memory compiler with Redundancy.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP 303HVT cell peripheral LVT.
Single Port SRAM Compiler IP, 4.0um2 bit cells, High density, Low Power, UMC 0.18um LL process
UMC 0.18um Logic process high density, Low Power, mini area, Single Port SRAM compiler.
Single Port SRAM Compiler IP, 4.0um2 bit cells, Synchronous, UMC 0.18um eFlash/G2 process
UMC 0.18um eFlash process GII 4.0um2 Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um HV process
UMC 0.11um HV process 1.35um2 Single Port SRAM compiler.