Single Port SRAM Compiler IP, UMC 0.11um EEPROM process
UMC 0.11um EE2PROM/LL 1.5V high density Single Port SRAM compiler.
- UMC
- 110nm
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Single Port SRAM Compiler IP, UMC 0.11um EEPROM process
UMC 0.11um EE2PROM/LL 1.5V high density Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous Single Port SRAM memory compiler with 1.41um2-Bit cell.
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash Single Port SRAM.
Single Port SRAM Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Enhancement) Logic process Single Port SRAM compiler with 141-Bit cell.
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process 1.41um2 Cell Single Port SRAM compiler.
Dual Port SRAM Compiler IP, Support Repair Features, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM with redundancy feature.
Dual Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Logic process Synchronous Dual Port SRAM memory compiler.
Dual Port SRAM Compiler IP, Support Repair Features, UMC 40nm LP process
UMC 40nm Logic process synchronous high density Dual Port SRAM memory compiler with redundancy.
Dual Port SRAM Compiler IP, UMC 0.18um eFlash/G2 process
UMC 0.18um eFlash GII Logic process high density Dual Port SRAM compiler.
Two Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous Two Port SRAM memory compiler.
Dual Port SRAM Compiler IP, Output: 1.8432MHz, UMC 40nm LP process
UMC 40nm LP Logic process synchronous high density Dual Port SRAM memory compiler.
Two Port Register File Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process synchronous high density Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 65nm SP process
UMC 0.65um SP/RVT Low-K Logic process synchronous Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT and HVT Low-K Logic process synchronous ultra high density/6T cell Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Enhancement) Logic process synchronous high density Two Port Register File SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler.
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm LL process
UMC 90nm LL/RVT Low-K Logic process Synchronous high density Single Port SRAM compiler With Redundancy.
Single Port SRAM Compiler IP, Support Repair Features, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process Single Port SRAM (Introduce Redundancy feature to the existing FSD0A_B_SH).