Low Power PLL for TSMC 40nm ULP
The OT3135 is a flexible low power clock multiplier PLL function with a wide range of input and output frequencies, and is design…
6 track High Density standard cell library at TSMC 180 nm
TSMC 180 G, SESAME HD provides the best trade-off between area and power achieved from an cell design enabling 6-track cells.
The RAR-eSR-qLR Retention Alternating Regulator combines two regulation sub-components: a high-efficiency switching regulator (eS…
RAR-eSR-qLR-ref-[1.62-3.63]-[0.55-2.5].04, as any Power Management Virtual Component designed by Dolphin Design, is readily retar…
Linear Regulator, Low quiescent current
The qLR-Aubrey-ref-[1.62-3.63]-[1.2-3.3]-I0.3-Iq200.01 is an ultra-low-quiescent-current regulator used to generate SoC internal …
Linear regulator with ultra low quiescent current for retention applications
Linear regulator with ultra low quiescent current for retention applications
Combined Power On Reset and Brown Out Reset
Combined Power On Reset and Brown Out Reset
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard IO devices
Linear Regulator for digital island
Linear Regulator to supply digital islands in TSMC 40nm uLP-eFlash
Low-BoM, inductor-based buck switching regulator with high efficiency, full PWM mode
Dolphin Design provides a Power Management IPs platform towards three objectives To standardize and ease Power Regulation Network…
Switching regulator, inductor-based, PWM mode, high efficiency
The eSR-Tugela is an inductor-based buck switching regulator with high efficiency.
Always-on Voice Activity Detection interfacing with analog microphones
The WT-a-HD.01 is a mixed analog/digital Virtual Component (ViC) containing a Voice Activity Detection (VAD) engine for ultra low…
24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels
The sADC-uLP-ANC.03 is a mixed (analog and digital) Virtual Component containing three mono ADCs, and additional functions offeri…
24-bit Cap-less ADC PLL-less 2 channels
The sADC-H1-LR.02 is a mixed (analog and digital) Virtual Component containing 2 mono ADCs, and additional functions offering an …
1.8V GPIO, 1.8V & 3.3V Analog in TSMC 180nm BCD
A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V GPIO, 1.8V to 3.3V Analog, with associated ESD cells.
Wirebond I/O Library in TSMC 130nm
A radiation-hardened TSMC 130nm Wirebond I/O Library with 3.3V GPIO, 3.3V LVDS TX & RX, 3.3V I2C ODIO, 3.3V Analog cell, OTP cell…
Ultra-low leakage I/O Library in TSMC 22nm
A TSMC 22nm Wirebond I/O Library with ultra-low leakage 1.8V GPIO, 1.8V I2C ODIO, 1.8V analog cell and associated ESD.
The TRC16024CPA is a four lane Gen 1,2,3,4 PCI Express Physical layer (Phy) Phy IP core, delivering high-speed serial data transm…
5V I/O and ESD in TSMC 12nm FFC/FFC+
A 5V Library for Generic I/O and ESD Applications TSMC 12NM FFC/FFC+ process.
180nm MTP Non Volatile Memory for Standard CMOS Logic Process
NSCore's TwinBit(TM) is the only embedded CMOS, multi-time programmable (MTP), non-volatile RAM IP of its kind, utilizing the 'ho…