USB 2.0 femtoPHY - Samsung 7LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
- USB 2.0
- Samsung
- 7nm
- SF7LPP
Single-Protocol PHY IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Single-Protocol PHY IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
USB 2.0 femtoPHY - Samsung 7LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 2.0 femtoPHY - Samsung 14LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 2.0 femtoPHY - Samsung 11LPP18 x1, OTG, North/South (vertical) poly orientation
The USB 2.0 PHY IP provides designers with the industry's best combination of low area and low power with support for USB Type-C …
USB 3.0 PHY - Samsung 28LPP18 x1, OTG, North/South (vertical) poly orientation
The USB-C 3.0 and USB 3.0 PHY IP provide designers with the industry's best combination of low area and low power with support fo…
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions.
USB-C 3.1/DP TX PHY for Samsung 14LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
USB-C 3.1/DP TX PHY for Samsung 11LPP, North/South Poly Orientation
The USB 3.1 PHY IP provides designers with the industry's best combination of low area and low power with support for the process…
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, SamSung 28FDSOI, 1.8V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
LVDS Driver/Buffer
LVDS Receiver
LVDS Transmitter
Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY
The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and…
SAMSUNG 28nm FDSOI USB2.0 Dual Role PHY/OTG PHY
The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard.
Samsung 28nm FDSOI USB3.0 Type-C PHY
IP
Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter
IP
Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver
IP