Vendor: SmartDV Category: FlexRay

FlexRay Synthesizable Transactor

FlexRay Synthesizable Transactor provides a smart way to verify the FlexRay component of a SOC or a ASIC in Emulator or FPGA plat…

Overview

FlexRay Synthesizable Transactor provides a smart way to verify the FlexRay component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's FlexRay SynthesizableVIP is fully compliant with standard FlexRay Specification and provides the following features.

Key features

  • Fully compatible with FlexRay specification Version 3.0.1
  • Supports complete FlexRay Tx/Rx functionality
  • Supports full Duplex of operations
  • Operates as a Tx or as a Rx
  • Supports 2.5, 5 and 10 Mbit/s bitrate
  • Supports all types of frame generation
    • Static frames
    • Dynamic frames
  • Supports transmit and receive commands that allow the user to transmit and receive FlexRay data
  • Supports cluster wakeup and startup
  • Supports Various kind of Tx and Rx errors insertion and detection
    • Syntax errors
    • Frame ID error (Frame ID = 0)
    • Header CRC error
    • CRC error
    • Over and undersize errors
    • Content errors
    • Cycle Count error
    • Frame ID error
    • Startup, Sync & Null frame errors w.r.t Dynamic segment
    • Startup & Sync frame errors w.r.t Static segment
    • Reception of Null frame
  • Supports configurable receive FIFO depth

Block Diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the FLEXRAY testcases
  • Examples showing how to connect and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Specifications

Identity

Part Number
FlexRay Transactor
Vendor
SmartDV
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: India

Learn more about FlexRay IP core

Keeping Pace with CXL Specification Revisions

As the Compute Express Link® (CXL®) specification rapidly evolves, so too must the tools and infrastructure used to verify designs built around it. Maintaining verification IP (VIP) that keeps pace with new specification revisions is no small task, particularly when dealing with major version shifts like the transition from CXL 2.0 to 3.0.

SmartDV Licenses SDIO IP Family to Ranix for V2X Products

To meet RANiX’s unique design goals, SmartDV will customize the IP to go beyond the standard SDIO functionality—thereby empowering RANiX to differentiate from their competitors. SmartDV will also provide RANiX with the requisite support and documentation to achieve ASIL certification for ISO 26262.

SmartDV Rolls Out Multi-Phase Expansion Plan

SmartDV™ Technologies, provider of flexible, customizable semiconductor design IP (intellectual property) and verification solutions, has expanded engineering operations beyond its headquarters in Bengaluru with the opening of a new office space in Coimbatore, Tamil Nadu, India.

Frequently asked questions about FlexRay IP cores

What is FlexRay Synthesizable Transactor?

FlexRay Synthesizable Transactor is a FlexRay IP core from SmartDV listed on Semi IP Hub.

How should engineers evaluate this FlexRay?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this FlexRay IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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