Overview
Now available up to 170 Mhz per channel !
This FPD Link Transmitter Macro is based on National emiconductor openLDI specification v0.95 dated May 13th 1999 that allow the transfer of digital display data between a display source and a display device.
This transmitter converts 8 LVDS, (low voltage differential ignaling) data streams, into up to 48 bits (dual pixel 24-bits) CMOS data plus 8 control signals (VSYNC, HSYNC, DE, and 5 user defined signals).
At a maximum pixel rate of 170Mhz, LVDS data line speed is 1190Mbps, providing a total maximum bandwidth of 9.52Gb/s (1190Mbytes per second).
Learn more about V-By-One IP core
At Silicon Creations, we have developed a power and area optimized, flexible and programmable PMA (Physical Medium Attachment) architecture that can be reliably ported to different process nodes and scaled across protocol generations as data rates increase. It is called the Multi-Protocol PMA, or MP-PMA for short.