Vendor: Analog Bits Inc. Category: High-Speed

Differential Output Driver on TSMC CLN3E

The Differential Output Driver macros provide a low noise, high performance differential output clock.

TSMC 3nm N3E View all specifications

Overview

The Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a push-pull differential driver which provides a nominal source driver resistance of 50 ohms (single-ended).

The output driver is implemented in Analog Bits’ proprietary architecture that uses core devices only. There is only one power supply so there are no power-up/power-down sequence restrictions.

Differential Output Buffer Operational Range Description Symbol Min Typ Max Units Input Frequency FCLK 5 100 600 MHz Input Duty Cycle tDI 40 60 % Output Duty Cycle TDO 45 55 % Driver Series Resistor (Single Ended) RS 50 Ohm Output Slew Rate Trf 4 16 V/ns Output Crossing Voltage VCROSS 0.25 0.55 V Output Variation of Common Mode Voltage VCM DELTA 140 mV Output Voltage High (single ended unterminated) VHIGH 0.825 V Output to Output Pad Skew Tskew -50 50 ps Output Slew Rate Matching ΔTrf 20 % Area A 0.0084 sq.mm Total Power @ 600MHz (terminated) IDD 7 9 mW Total Power @ 600MHz (unterminated) IDD 3.5 5 mW Operational Voltage (Analog) VDDA 0.675 0.75 0.825 V Operational Temperature TOP -40 25 125 C Differential Output Buffer Functional Specification

Key features

  • Wide output frequency range support for diverse clocking needs
  • Implemented with Analog Bits’ proprietary architecture
  • Low power consumption
  • Requires no additional on-chip components or band-gaps, minimizing power consumption

Silicon Options

Foundry Node Process Maturity
TSMC 3nm N3E —

Specifications

Identity

Part Number
Differential Output Driver on TSMC CLN3E
Vendor
Analog Bits Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about High-Speed IP core

Analog Bits to Participate in a Customer Test Chip Tapeout on TSMC A14 and Present Papers with Cerebras, Arm and Socionext on Real-Time On-Chip Power Sensing and Delivery at 2026 TSMC Global OIP Ecosystem Events

At TSMC 2026 North America OIP Ecosystem Forum, Analog Bits will showcase new real-time power observability and sensing analog IP in TSMC’s N2P process technology and present a paper with Cerebras; Papers planned with partners at global OIP Ecosystem events to highlight smarter power delivery for scalable SoCs targeting data centers, automotive and more.

Frequently asked questions about High-Speed I/O Pad IP

What is Differential Output Driver on TSMC CLN3E?

Differential Output Driver on TSMC CLN3E is a High-Speed IP core from Analog Bits Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this High-Speed?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this High-Speed IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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