CML Buffer on TSMC CLN3P-CLN3X
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requi…
Overview
The CML buffer macro is a CML differential buffer for on-chip applications, and addresses a large portfolio of applications requiring CML signal levels on-chip. The buffer is designed for digital logic processes and uses robust design techniques to work in noisy SoC environments, ranging from high speed communication to low power consumer applications.
The buffer macro is implemented in Analog Bits’ proprietary architecture that uses core devices at core voltage only.
Buffer Operational Range Description Symbol Min Typ Max Units Input Frequency FCLK 1 600 MHz Input Duty Cycle tDI 40 60 % Total Area of Macro (45.120um [X] by 26.208um [Y]) A 0.0012 sq.mm Total Power (from supply) P 2.5 mW Output Load CL 500 fF Operational Voltage (Analog) VDDA 0.675 0.75 0.825 V Operational Temperature TOP -40 25 125 C
Key features
- CML differential buffer for on-chip applications
- Wide Ranges of input frequencies for diverse clocking and data needs
- Implemented with Analog Bits’ proprietary architecture
- Requires no additional on-chip components or band-gaps, minimizing power consumption
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 3nm | N3P | — |
Specifications
Identity
Files
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Provider
Learn more about Amplifier IP core
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Frequently asked questions about Amplifier IP cores
What is CML Buffer on TSMC CLN3P-CLN3X?
CML Buffer on TSMC CLN3P-CLN3X is a Amplifier IP core from Analog Bits Inc. listed on Semi IP Hub. It is listed with support for tsmc.
How should engineers evaluate this Amplifier?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Amplifier IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.