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Vendor:
Synopsys, Inc.
Category:
CPU
ARC HS45Dx2 dual-core version of dual-issue HS45D with ARCv2DSP ISA, with 100+ DSP instructions
The ARC® HS45D and HS47D processors feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where …
Overview
The ARC® HS45D and HS47D processors feature a dual-issue, 32-bit, RISC + DSP architecture for use in embedded applications where high-performance and high clock speed plus signal processing are required. The cores can be clocked at up to 1.9 GHz in 16ff processes (worst case, single core, base configuration) and offer outstanding performance delivering 3.0 DMIPS/MHz and 5.2 CoreMark/MHz with a small area footprint and low power consumption.
The processors are based on the advanced ARCv2DSP instruction set architecture (ISA) and pipeline, which provides leading performance-efficiency and code density, and more than 150 DSP instructions. For applications requiring higher performance, dual- and quad-core versions of the HS45D and HS47D cores are available.
The ARC HS45D features close coupled memory (CCM) and is optimized for use in applications where real-time, deterministic behavior is required. The HS47D is designed for high-performance embedded applications that require cache and includes all of the features of the HS45D plus support for up to 64K Level 1 (L1) instruction and data cache.
The processors are designed to be used in applications such as wireless baseband, voice/speech processing, home audio, automotive systems, and other high-end embedded applications that require signal processing.
Key features
- Combination Dual-issue, 32-bit RISC + DSP processor
- Delivers up to 5700 DMIPS and 9880 CoreMark per core at 1.9 GHz on 16ff (worst case conditions, single-core configuration)
- ARCv2DSP ISA adds over 150 DSP instructions
- Easy DSP programming support with Metaware C/C++ Compiler
- Feature-rich DSP software library for easy algorithm programming
- One 32x32, Two 16x16, or two dual 16x16 MACs/cycle
- Fixed point, vector/SIMD DSP processing support
- Based on advanced ARCv2 ISA
- Support for custom instructions
- Support for up to 16MB of close coupled memory and direct mapping of peripherals
- Dual- and quad-core versions for higher performance
Block Diagram
dwc_arc_hs45dx2_core block diagram
Specifications
Identity
Part Number
dwc_arc_hs45dx2_core
Vendor
Synopsys, Inc.
Type
Silicon IP
Compute
CPU Architecture
ARC
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
USA
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Frequently asked questions about CPU IP cores
What is ARC HS45Dx2 dual-core version of dual-issue HS45D with ARCv2DSP ISA, with 100+ DSP instructions?
ARC HS45Dx2 dual-core version of dual-issue HS45D with ARCv2DSP ISA, with 100+ DSP instructions is a CPU IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this CPU?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.