Vendor: TES Electronic Solutions Category: Symmetric Crypto

Advanced Encryption Standard (AES) core

AES is one of the latest crypto standards certificated by the National Institute of Standard and Technology (NIST).

Overview

AES is one of the latest crypto standards certificated by the National Institute of Standard and Technology (NIST). The AES is a symmetric block cipher algorithm. It provides a high security level for data transmission. The TES Electronic Solutions hardware implementation offers a high level of security and flexibility for the customer.

The AES / Rijndael module is a hardware implementation of the Rijndael algorithm specified by J. Daemen and V. Rijmen and described in NIST Federal Information Processing Standard proposal document (NIST FIPS 197).

Two different decoder and encoder versions are available, optimised for high data rate or low gates quantity. They are also available as implementations with or without key expansion. The block- and key size is configurable (128, 192 or 256 bit). Other specified block- and key sizes can be easily supported.

Function

The AES / Rijndael core can handle input block sizes of 128, 192 or 256 bit. The Encoder needs the key and the plain text as input. The start_en signal signalise the beginning of an encryption. The input data is read and ciphered. After the cipher text is build the cipher data were wrote to the output and the ready_en signal signalised this.

Cores available

  • TES Rijndael Slow AES Decoder
  • TES Slow AES Encoder
  • TES Slow AES De-/Encoder
  • TES Rijndael Fast AES Decoder
  • TES Fast AES Encoder
  • TES Fast AES De-/Encoder
  • TES Standard Slow AES Decoder
  • TES Standard AES Encoder
  • TES Standard AES De-/Encoder
  • TES Standard Fast AES Decoder
  • TES Standard AES Encoder
  • TES Standard AES De-/Encoder

Performance

Fast AES

 

Altera (Apex20ke):

Decoder
  • Fmax up to 100 MHz
  • 1357 LE and 28 ESB
  • throughput 1.15 Gbit / sec
Encoder
  • Fmax up to 100 MHz
  • 895 LE and 21 ESB
  • throughput 1.15 Gbit / sec

Testing

Known Answer Test and Monte Carlo Tests described from the NIST were successfully done. The tests were done in Electronic Codebook Mode and in Cipher Block Chaining Mode. The TES Electronic Solutions AES Core passed all Tests.

Key features

  • Complete AES implementation to latest NIST FIPS-197
  • 128 bit block size and configurable bit key size (128, 192 or 256 bit)
  • Technology independent HDL model
  • Simple external interface, easy adaptation
  • Structured core design, acces to internal nodes
  • Implementation for high data rate
  • Implementation with or without key expansion

Benefits

  • One of the fastest AES implementations
  • Every AES specified block size can be realised
  • Separate implementation for encode and decode
  • Every user requirements can be easily implemented

Applications

Every application which needs a cryptographic algorithm to protect sensitive (unclassified) information.

Examples:

  • Electronic Financial Transactions
  • Secure Communication Links
  • Secure Video surveillance systems
  • Entertainment Systems (Pay-per-view)
  • Encrypted Data Storage

What’s Included?

  • HDL RTL code or net list for each required technology
  • Testbench with functional test vectors
  • User-Documentation

Specifications

Identity

Part Number
TS EN AESA VH
Vendor
TES Electronic Solutions
Type
Silicon IP

Security

Crypto Algorithm
AES

Files

Note: some files may require an NDA depending on provider policy.

Provider

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Frequently asked questions about Symmetric Cryptography IP cores

What is Advanced Encryption Standard (AES) core?

Advanced Encryption Standard (AES) core is a Symmetric Crypto IP core from TES Electronic Solutions listed on Semi IP Hub.

How should engineers evaluate this Symmetric Crypto?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Symmetric Crypto IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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