The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adap…
The ADC IP is a general-purpose sigma-delta converter and it is configurable for conversion speed and power consumption with adaptable oversampling ratio.
It is built using typical second order architecture using correlated-double-sampling method. The target application is sampling of transient input voltages with 8kS/s with low-power and 192kS/s respectively.
The ADC IP includes reference voltage generation (optional) and 4-to-1 input multiplexer (optional) providing 4 differential input channels.
The ADC is silicon proven in Automotive mass production using the XFAB XH018 process.
Measurement results and samples are available.
Fraunhofer IIS provides a detailed documentation and support for the IP integration. Modifications, extensions and technology ports of the IP are available on request.
Note: some files may require an NDA depending on provider policy.
15 Bit 8 kS/s Sigma-Delta ADC on XFAB XH018 is a ADC IP core from Fraunhofer Institute Integrated Circuits and Systems (IIS) listed on Semi IP Hub.
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this ADC IP.
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.
