Xilinx, Inc.
•
HQ:
USA
The XPS Timer/Counter is a 32-bit timer module that attaches to the PLB bus.
- Timers & Watchdogs
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Xilinx, Inc.• HQ: USA
The XPS Timebase Watchdog Timer Interface is a 32-bit peripheral that connects to the PLB (Processor Local Bus) and provides the …
- Timers & Watchdogs
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XPS System Monitor/Analog Digital Converter
Xilinx, Inc.• HQ: USAThe XPS SYSMON ADC IP Core is a 32-bit slave peripheral that connects to the PLB (Processor Local Bus) and provides the controlle…
- ADC
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Xilinx, Inc.• HQ: USA
The XPS Interrupt Controller (XPS INTC) concentrates multiple interrupt inputs from peripheral devices to a single interrupt outp…
- Interrupt Controller
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Xilinx, Inc.• HQ: USA
This document describes the specifications for the General Purpose Input/Output (GPIO) core for the Processor Local Bus (PLB).
- GPIO
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XPS External Peripheral Controller
Xilinx, Inc.• HQ: USAThis specification defines the architecture and interface requirements for the External Peripheral Controller (EPC).
- System Controller
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XPS Delta-Sigma Digital to Analog Converter
Xilinx, Inc.• HQ: USADigital to analog converter (DAC) converts a binary number into a voltage directly proportional to the value of the binary number.
- DAC
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XPS Delta-Sigma Analog to Digital Converter
Xilinx, Inc.• HQ: USAThe analog to digital conversion is realized in the XPS Delta-Sigma ADC (XPS ADC) using Delta-Sigma conversion technique.
- ADC
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XPS System ACE Interface Controller (Compact Flash)
Xilinx, Inc.• HQ: USAThe XPS System ACE Interface Controller (or, interchangeably, the XPS SYSACE) is the interface between the Processor Local Bus (P…
- Controller
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XPS Multi-Channel External Memory Controller (SRAM/Flash)
Xilinx, Inc.• HQ: USAThe Xilinx Multi-Channel External Memory Controller (XPS MCH EMC) provides the control interface for external synchronous, asynch…
- Controller
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Xilinx, Inc.• HQ: USA
The XPS Central DMA Controller provides simple Direct Memory Access (DMA) services to peripherals and memory devices on the PLB.
- DMA
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Xilinx, Inc.• HQ: USA
The XPS BRAM Interface Controller is a Xilinx IP module that incorporates a PLB V4.6 (Processor Local Bus) interface.
- System Controller
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Multi-Port Memory Controller (DDR/DDR2/SDRAM)
Xilinx, Inc.• HQ: USAMPMC is a fully parameterizable memory controller that supports SDRAM/DDR/DDR2 memory.
- Controller
- DDR2
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Mixed-Mode Clock Manager (MMCM) Module
Xilinx, Inc.• HQ: USAThe MMCM primitive in Virtex®-6 parts is used to generate multiple clocks with defined phase and frequency relationships to a giv…
- PLL
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Xilinx, Inc.• HQ: USA
The PLBV46 Master Burst is a continuation of the Xilinx family of IBM CoreConnect compatible LogiCORE™ products.
- Protocol Bridge
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Xilinx, Inc.• HQ: USA
The On-Chip Peripheral Bus (OPB) to Processor Local Bus (PLB v4.6) Bridge module translates OPB transactions into PLBV46 transact…
- Protocol Bridge
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Differential Signaling IO Buffer
Xilinx, Inc.• HQ: USAThe Utility Differential Signaling Buffer core generates corresponding buffer to bring off-chip differential signals into interna…
- High-Speed
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Xilinx, Inc.• HQ: USA
The Clock Generator module provides clocks according to clock requirements.
- Clock Generator
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ChipScope PRO Virtual Input/Output (VIO)
Xilinx, Inc.• HQ: USAThe LogiCORE™ IP ChipScope™ Pro Virtual Input/Output (VIO) core is a customizable core that can both monitor and drive internal F…
- Debug Trace
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Chipscope PLBv46 Integrated Bus Analyzer (IBA)
Xilinx, Inc.• HQ: USAThe ChipScope™ PLB IBA core is a specialized Bus Analyzer core designed to debug embedded systems that contain the IBM CoreConnec…
- Debug Trace