DO-254 Bilinear Video Scaler 1.00a
Provides a high-quality scaling solution for designs ranging from polyphase to linear interpolation for up and down scaling.
DO-254 Test Pattern Generator 1.00a
Provides a wide variety of tests patterns enabling users to debug and asses video system color, quality, edge and motion performa…
DO-254 DDR Memory Controller 1.00a
A dedicated embedded block multi-port memory controller that greatly simplifies the task of interfacing Spartan-6 devices to the …
DO-254 AXI to PCI Bridge 1.00a
Provides full bridge functionality between the Xilinx® AXI interface and a 32-bit Revision 2.2 compliant Peripheral Component Int…
DO-254 AXI Bridge For PCI Express 1.00a
An interface between the AXI4 and PCI Express®.
DO-254 Tri-Mode Ethernet Media Access Controller (TEMAC) 1.00a
Consists of a separate transceiver (transmitter) and receiver IP core implementing a point to multipoint communication channel bu…
DO-254 UART Serial Interface Controller 1.00a
UART compatible Serial Interface Controller with Receive and Transmit FIFOs and support for bit rates from 9600 to 921600 baud.
DO-254 Multi-Format Video Deinterlacer 1.00a
High-performance video deinterlacer.
DO-254 I2C Master Serial Interface Controller 1.00a
Master serial interface compatible with the popular Philips® I2C standard.
Consists of a separate transceiver (transmitter) and receiver IP core implementing a point to multipoint communication channel bu…
DO-254 ARINC 818 XGA Transceiver
Provides an easy way to implement ARINC 818 compliant interfaces in Xilinx® FPGAs.
The Soft Error Mitigation (SEM) IP core performs SEU detection, correction, and classification.
Generates fully verified first-in, first-out (FIFO) memory queues ideal for applications requiring in-order data storage and retr…
DO-254 Distributed Memory Generator 1.00a
Creates a variety of memory structures using Select RAM.
DO-254 Block Memory Generator 1.00a
Automates the creation of resource and power optimized block memories for Xilinx® FPGAs Note: Used as sub-IP within FIFO Generator
DO-254 Local Memory Bus (LMB) 1.00a
The LMB is a fast, local bus for connecting MicroBlaze™ instruction and data ports to high-speed peripherals, primarily on-…
DO-254 LMB BRAM Interface Controller 1.00a
The interface between the LMB and the BRAM block peripheral.
DO-254 External Memory Controller 1.00a
Provides the control interface for external synchronous, asynchronous SRAM, Flash and PSRAM/Cellular RAM memory devices through t…
DO-254 AXI Universal Asynchronous Receiver Transmitter (UART) 16550 1.00a
Connects through an AXI4-Lite interface and provides the controller interface for asynchronous serial data transfer.
DO-254 AXI Timebase Watchdog Timer 1.00a
Provides a 32-bit free-running timebase and watchdog timer.