Frontgrade Gaisler
•
HQ:
Sweden
GRCAN is a CAN 2.0 IP core that implements an internal CAN controller and an AHB DMA backend.
- CAN / CAN-FD / CAN-XL
- Production
- Now
- CAN 2.0, AMBA 2.0
Compare 588 Low-Speed Control Interface IP Cores from 76 vendors
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Silvaco, Inc.• HQ: United States
Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive …
- CAN / CAN-FD / CAN-XL
- Silicon Proven
- Now
- Full-CAN, CAN 2.0B
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Protocol controller IP for CAN / CAN FD
Robert Bosch GmbH• HQ: GermanyThe M_CAN module is the new CAN Communication Controller IP-module that can be integrated as stand-alone device or as part of an …
- CAN / CAN-FD / CAN-XL
- now
- Supports CAN Protocol versi…
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SmartDV Technologies• HQ: India
SmartDV’s MIL-STD-1553 Controller IP is a silicon-proven, fully featured avionics data bus solution purpose-built for defense, ae…
- Controller
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Arasan Chip Systems Inc.• HQ: USA
Arasan’s xSPI/PSRAM interface PHY is designed to work with both the xSPI or PSRAM master host controller IPs.
- PHY
- XSPI
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TES Electronic Solutions• HQ: Germany
The TS_CAN_3V3_X8 is a 3.3V CAN transceiver, which supports data rates up to 1Mbps and is compatible with ISO 11898-2 compliant C…
- CAN / CAN-FD / CAN-XL
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TES Electronic Solutions• HQ: Germany
The Controller Area Network (CAN) is a reliable serial bus protocol defined in the Bosch CAN specifications for standard CAN 2.0B…
- CAN / CAN-FD / CAN-XL
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System Level Solutions, Inc.• HQ: USA
Avalon compliant I²C Master IP core provides an interface between Nios II processor and an I²C Slave device.
- I2C / I3C
- Now
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Logic Design Solutions• HQ: FRANCE
The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one o…
- ARINC 429
- Now
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Synective Labs AB• HQ: Sweden
The IP is compliant to the new ISO 11898-1:2015 standard, supporting both standard CAN and CAN FD.
- CAN / CAN-FD / CAN-XL
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Arasan Chip Systems Inc.• HQ: USA
The MIPI I3CⓇ Total IP solution is a seamless integration of MIPI I3CⓇ controller, MIPI I3CⓇ PHY I/O, and MIPI I3CⓇ software stac…
- I2C / I3C
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Arasan Chip Systems Inc.• HQ: USA
The QSPI master core is easy to use, simple to work with, quick to operate, and reliable under all conditions.
- SPI / QSPI XSPI
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Arasan Chip Systems Inc.• HQ: USA
Classical CAN, also known as CAN 2.0 Bus Controller IP, is the foundational CAN bus standard.
- CAN / CAN-FD / CAN-XL
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Arasan Chip Systems Inc.• HQ: USA
The xSPI PHY is designed to work with both the xSPI/PSRAM and the xSPI master host controller IPs.
- SPI / QSPI XSPI
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CAST• HQ: USA
The CSENT-TX core implements a transmitter for the Single Edge Nibble Transmission (SENT) protocol.
- SENT
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CAST• HQ: USA
The CSENT-RX core implements a receiver for the Single Edge Nibble Transmission (SENT) protocol.
- SENT
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Frontgrade Gaisler• HQ: Sweden
The I²C slave core is a simple I²C slave that provides a link between the I²C bus and the AMBA APB.
- I2C / I3C
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Silicon Cores - a Div. of Silicon Interfaces• HQ: USA
UART eVC is a fully documented, off the shelf component for Cadence Specman Elite functional verification environment.
- UART
- now
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Silicon Cores - a Div. of Silicon Interfaces• HQ: USA
The SafeSPI is a secure version of the SPI protocol that has been designed to provide enhanced security features, making it suita…
- SPI / QSPI XSPI
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Silicon Cores - a Div. of Silicon Interfaces• HQ: USA
The SPI protocol specification supports high speed data transfer as per the peripheral specification, making it ideal for high - …
- SPI / QSPI XSPI