The BLE5T55ULP RF IP is designed for TSMC 55nm ULP Process.
- TSMC
- 55nm
- GP
- Silicon Proven
The BLE5T55ULP RF IP is designed for TSMC 55nm ULP Process.
Bluetooth 5.0 LE and Sub-GHz Transceiver
The BLE5SUBGT40ULP RF IP is designed for TSMC 40nm ULP Process.
Special I/O-eMMC/SDIO in TSMC(22nm, 28nm, and 40nm)
SD (Secureity Digital) and eMMC (embedded MultiMedia Card) I/Os are non-volatile memory interface technologiesy with high bandwid…
Standard Cell Library in TSMC (12nm~180nm)
M31 provides a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cel…
General Purpose I/O (GPIO) in TSMC(12nm,16nm,22nm, 28nm, 40nm, 90nm BCD+, 152nm BCD, 180nm BCD)
GPIO is a general-purpose input/output unit that provides basic input/output functionalities.
Memory Compiler in TSMC (16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
M31 memory compilers are designed with high industrial standard which provides the memory solutions for density, power, and perfo…
PCIe 4.0 PHY in TSMC(6nm,7nm, 12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications.
ONFI I/O 6.0/5.1/5.0 IP in TSMC(3nm, 5nm, 6nm, 12nm, 16nm, 22nm, 28nm, 40nm, 55nm)
ONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage appli…
1.8V General Purpose Staggered I/O Pad Set
The 1.8V GPIO library provides general purpose bidirectional I/O cells.
3.3V Wide-Range General Purpose Inline I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
1.8V General Purpose I/O Staggered Pad Set
The 1.8V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
TSMC CLN16FFC Ternary Content Addressable Memory
IGMTLSLV02A is a synchronous LVT periphery high-density ternary content addressable memory (TCAM).
This datasheet describes GUC’s HBM (High Bandwidth Memory) PHY IP, which can be integrated with HBM memory controller to provide …
TSMC CLN28HPC 12-bit 250MHz Current Steering DAC [2ch]
The IGADACT10A is a general-purpose 2-channel digital to analog converter with 12-bits resolution.
TSMC CLN28HPC+ 2.4GSps Analog Front-End
The IGAAFET05A which contains ADCs, DACs and PLLs is an analog front-end (AFE) IP for RF applications.
The SMBus library provides open-drain bi-directional I/O cells designed for the High-Power SMBus two-line interface.
The ESD Protection library provides ESD protection components.
6 track High Density standard cell library at TSMC 180 nm
TSMC 180 G, SESAME HD provides the best trade-off between area and power achieved from an cell design enabling 6-track cells.
The RAR-eSR-qLR Retention Alternating Regulator combines two regulation sub-components: a high-efficiency switching regulator (eS…