Remote Debug using Vivado Design Suite
Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.
This capability helps facilitate hardware debug for designs that:
* Have the FPGA in a hard-to-access location, where a "lab-PC" is not close by
* Do not have direct access to the FPGA pins – e.g. the JTAG pins are only accessible via a local processor interface
* Need to efficiently debug Xilinx FPGA or SoC systems deployed in the field to save on costly or impractical travel and and reduce the time it takes to debug a remotely located system
Xilinx Virtual Cable
Overview
Key Features
- Have the FPGA in a hard-to-access location, where a "lab-PC" is not close by
- Do not have direct access to the FPGA pins – e.g. the JTAG pins are only accessible via a local processor interface
- Need to efficiently debug Xilinx FPGA or SoC systems deployed in the field to save on costly or impractical travel and and reduce the time it takes to debug a remotely located system