The present IP is a Voltage Detector (VDT) circuit.
- Voltage Monitor
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
The present IP is a Voltage Detector (VDT) circuit.
The present IP is a VCC Detector (VDT) circuit.
GSMC 0.18um 1.8v Ring Oscillator
The present IP is a Ring Oscillator.
GSMC 0.18um 1.8v Ring Oscillator
The present IP is a Ring Oscillator.
GSMC 0.18um 1.8v RC Oscillator
The present IP is a RC oscillator with one external resistor to generate 25~50 MHz clock.
GSMC 0.18um 1.8v RC Oscillator
The present IP is a RC oscillator with one external resistor to generate 25~50 MHz clock.
GSMC 0.18um 5v-3.3v/1.8v Power Regulator
Based on GSMC 0.18um 3.3v/1.8v Logic process, current design of the Power Regulator is to provide both 3.3v and 1.8v power suppli…
GSMC 0.18um 3.3v/1.8v Power Regulator
Present project is a regulator that generates 1.8v voltage from 3.3v power supply.
This is a Power-On-Reset circuit that generates a reset pulse when power supply is on.
The present IP is a Power On Reset (POR) circuit without external resistors or capacitors.
audio clock Generation, output nine kinds of 256*fs from 12M reference input
This PLL is designed for audio clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
Present IP is a programmable Analog PLL suitable for high speed clock generation.
The GSMC18_PLL_01 is developed as a macro cell for clock generation.
GMSC 0.18um MMC including PRG03,VDT01,POR03,ROSC01
To provide a solution to the MMC cards, GSMC18_MMC_03 is consolidated by four independent IPs: GSMC18_PRG_03, GSMC18_ROSC_01, GSM…
This IP is a programmable Analog PLL suitable for high speed clock generation.
This IP is a programmable Analog PLL suitable for high speed clock generation.
SMIC 0.13μm 1.2v 200MHz Ring Oscillator
The present IP is a Ring Oscillator which is controlled by external bias current from bandgap.
IP
Band Gap IP, Input: 1.0V - 1.5V, VBG=0.615V, UMC 0.13um HS/FSG process
Input 1.0V-1.5V, VBG=0.615V, Bnad Gap, HS process, UMC 0.13um HS/FSG Logic process.