Linear Regulator IP, Output: 3.3V/100mA, UMC 0.13um HS/FSG process
3.3V with 100mA driving capability, Istb=65uA Linear Regulator, UMC 0.13um HS/FSG Logic process.
- UMC
- 130nm
- HS
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Linear Regulator IP, Output: 3.3V/100mA, UMC 0.13um HS/FSG process
3.3V with 100mA driving capability, Istb=65uA Linear Regulator, UMC 0.13um HS/FSG Logic process.
Linear Regulator IP, Output: 3.3V/50mA, UMC 0.13um HS/FSG process
3.3V with 50mA driving capability, Istb=70uA Linear Regulator, UMC 0.13um HS/FSG Logic process.
PLL (De-Skew) IP, Input: 15MHz - 110MHz, Output: 15MHz - 110MHz, UMC 0.13um HS/FSG process
Input 15M-110MHz, output 15M-110MHz, De-skew PLL with 0.9V~1.32V power supply range, UMC 0.13um HS/FSG Logic process.
PLL IP, Input: 25MHz/50MHz/100MHz/125MHz, Output: 25MHz/125MHz/1.25GHz, UMC 0.13um HS/FSG process
high speed clock generator using UMC 0.13um 1.2V HS process.
Input 20M-200MHz, output 250M-500MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
Input 10M-200MHz, output 25M-400MHz, frequency synthesizable PLL, UMC 0.13um SP/FSG Logic process.
Ring Oscillator IP, Output: 12KHz, UMC 0.13um HS/FSG process
Self-contained ring oscillator, frequency 12KHz.
RC Oscillator IP, Output: 40MHz, UMC 0.13um HS/FSG process
Internal-RC, trimmable fixed frequency 40MHz.
RC Oscillator IP, Output: 15MHz - 50MHz, UMC 0.13um HS/FSG process
15M~50MHz RC Oscillator with External R, UMC 0.13um HS/FSG Logic process.
RC Oscillator IP, Output: 4MHz - 15MHz, UMC 0.13um HS/FSG process
4M~15MHz RC Oscillator with External R, UMC 0.13um HS/FSG Logic process.
Input 20M-200MHz, output 250M-500MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
PLL IP, Input: 20MHz - 200MHz, Output: 250MHz - 500MHz, UMC 0.13um HS/FSG process
The FXPLL130HC0H is a phase locked loop with an operating range of 250M~500MHz, UMC 0.13um HS/FSG Logic process.
Input 20M-200MHz, output 500M-1000MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
Input 20M-200MHz, output 50M-100MHz, frequency synthesizable PLL, UMC 0.13um Logic HS process.
8 bits 160MS/s pipeline ADC - 0.25um
8 bits 160MS/s pipeline ADC
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process
18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process.
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process
18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process.
Linear Regulator IP, Output: 3.3V/240mA, UMC 0.18um LL process
3.3V with 240mA driving capability, Istb=uA Linear Regulator, UMC 0.18um LL Logic process.
Voltage Detector IP, UMC 0.18um LL process
Voltage detector for flash protect, UMC 0.18um LL Logic process.
Voltage Detector IP, UMC 0.18um LL process
VDT for MMC, UMC 0.18um LL Logic process.