Meet the SERDES challenge: Design a high-speed serial backplane
October 7, 2011
Semiconductor IP Articles Archive - Page 89 of 231
Designing a high-definition FPGA-based graphics controller
October 6, 2011
Reducing Turnaround Time with Hierarchical Timing Analysis
October 5, 2011
Debunking the myth of the $100M ASIC
October 4, 2011
Validating your GNU platform toolchain: tips and techniques
October 3, 2011
Static Formal Verification for System Level Verification
October 3, 2011
NAND Flash memory in embedded systems
September 29, 2011
Understanding Android's strengths and weaknesses
September 29, 2011
A practical approach to IP quality inspection
September 27, 2011
Metrix Driven Hardware Software System Level Verification
September 26, 2011
Partial reconfiguration in FPGA rapid prototyping tools
September 22, 2011
SerDes in High-Reliability, Long Reach Systems
September 19, 2011
3D-IC Design: The Challenges of 2.5D versus 3D
September 19, 2011
Managing IP quality in the SoC era requires a purpose-built DM approach
September 19, 2011
xLuna: a Real-Time, Dependable Kernel for Embedded Systems
September 15, 2011
5 Wirebond Power Bus Watch Out!
September 12, 2011
Performance Measurements of Synchronization Mechanisms on 16PE NOC Based Multi-Core with Dedicated Synchronization and Data NOC
September 8, 2011
FPGA-based Ethernet switches for real-time applications
September 8, 2011
USB3.0 application building using low performance 8-bit microcontroller
September 6, 2011
Using Multi-Gigabit Transceivers to Test and Debug FPGA
September 6, 2011