Xilinx bolsters IP arsenal; InSilicon, MIPS hook up
Xilinx bolsters IP arsenal; InSilicon, MIPS hook up
By Michael Santarini, EE Times
August 7, 2000 (12:55 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000807S0018
Xilinx has announced the availability of 29 new cores for use with Xilinx Foundation and Alliance 3.1 software development tools.
The cores support Xilinx's new Virtex-II architecture and are claimed to be scalable to any FPGA density without performance degradation. The release also supports Spartan-II FPGAs.
Four groups of cores are being unveiled: DSPs; storage elements and memories; math functions; and basic elements.
The DSP group includes high-performance cores such as a parameterized finite impulse response filter generator and fast Fourier transforms.
The company claims the DSP cores let designers implement high-performance signal-processing systems that operate at up to 0.6 trillion multiply-and-accumulates (Terra MACs) per second in Virtex-II architecture, the level of performance necessary for emerging applications such as third-generation (3G) and 4G wireless basestations.
The storage elements and memories group includes cores such as parameterized asynchronous FIFOs and single dual-port on-chip memories-key building blocks in many system-level designs.
The cores are available to licensed Xilinx users at no cost.They can be downloaded now from the Xilinx IP (intellectual property) center at www.xilinx.com/ipcenter.
---
InSilicon Corp. and MIPS Technologies Inc. have announced an agreement that allows for the inclusion of MIPS Technologies' embedded processor cores in platform design solutions from InSilicon.
According to the companies, under the agreement, InSilicon may license to its customers cores from MIPS Technologies' MIPS32 4K RISC core processor family.
InSilicon said it intends to develop application-specific vertical market IP that gives the customer a fuller platform solution. Visit www.insilicon.com for more information.
---
Wireless multimedia software and services provider PacketVideo Corp. (San Diego) and microprocessor core vendor ARM (Cambridge, England) have announced that ARM will optimize PacketVideo's wireless video decoder software for the ARM architecture.
According to the companies, the software, which will run on all ARM microprocessor cores, will help accelerate the deployment of wireless multimedia services and applications worldwide.
PacketVideo has developed standards-compliant MPEG-4 software that enables the encoding, decoding and transmission of full-motion video over wireless networks to mobile devices.
The companies said they are collaborating to provide systems and semiconductor manufacturers with a solution that will scale to accommodate a range of wireless environments, without the need for additional hardware acceleration. Visit www.packetvideo.com or www.arm.com.
Related Semiconductor IP
- ASA Motion Link PHY
- Configurable CNN accelerator
- RISC-V Display Connectivity Subsystem (DCS)
- AES-GCM - Authenticated Encryption and Decryption
- AES-GCM Authenticated Encryption and Decryption
Related News
- MIPS lands up in China
- AMD Acquisition of Xilinx Heats Up Competition with Intel
- inSilicon Corporation Appoints Barry A. Hoberman Interim CEO
- inSilicon Corporation Reports First Quarter Financial Results
Latest News
- Sony Semiconductor Solutions and TSMC Enter Preliminary Agreement for Next-Generation Image Sensor Strategic Partnership
- M31 Gains Momentum in Advanced Processes, Targets Double-Digit Growth in 2026
- SCALINX Joins GlobalFoundries GlobalSolutions Ecosystem to Expand High-Speed Data Converter SoC Solutions
- TSMC April 2026 Revenue Report
- UMC Reports Sales for April 2026