UMC, Faraday prep 90-nm IP cores and libraries
UMC, Faraday prep 90-nm IP cores and libraries
By Mark LaPedus , Semiconductor Business News
January 30, 2003 (5:35 p.m. EST)
URL: http://www.eetimes.com/story/OEG20030130S0049
HSINCHU, Taiwan--Preparing for a wave of next-generation chips, Taiwan's Faraday Technology Corp. here today announced the development of test chips and design libraries--based on United Microelectronics Corp.'s 90-nm process technology. Faraday, a Taiwanese provider of intellectual property (IP) cores and ASIC design services, is attempting to get a jump on the competition in the emerging 90-nm chip space. It claims to have “taped out” its products by using the 90-nm foundry process from UMC and EDA tools from Magma Design Automation Inc. The announcement marks the initial completion of a comprehensive set of IP and library modules optimized for UMC's 90-nm process, according to Hsinchu-based UMC. Last year, UMC announced its 90-nm process, equipped with copper interconnects, low-k dielectrics, as well as a silicon-on-insulator (SOI) option (see July 7, 2002 story ). “ The availability of Faraday's 90-nanometer IP represents another important step towards making this technology widely accessible to customers who require the highest performance process for their products,” said Fu Tai Liou, president of the America Business Group for UMC, in a statement. Still, analysts wonder when 90-nm chip production will move into the mainstream. Tools, transistors and libraries for the 90-nm node might be there for the taking, but design and process complexities will conspire to push out the production of these next-generation chips until 2005, a panel of experts agreed at DesignCon conference this week (see today's story ).
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