Tackling the challenges of RISC-V
By Nick Flaherty, eeNews Europe (April 29, 2022)
Calista Redmond, CEO of RISC-V International, talks to Nick Flaherty of eeNews Europe about the challenges facing RISC-V ahead of a major community meeting in Paris next week.
The RISC-V Foundation was founded in 2015 with 29 members, and RISC-V International, based in Switzerland, now has over 2000 members in more than 70 countries. Members are meeting in Paris next week for RISC-V Spring Week 2022.
With all these members, one of the challenges is the risk of fragmentation, RISC-V is an open instruction set for microcontroller and microprocessors where is easy to add extensions, but this can lead to many different versions that could be incompatible. RISC-V International has over 60 tasks groups, rising to 75 this year, working on different areas including the extension definitions, application reference designs and the tool ecosystem.
“One of the things that’s important for us is to find the areas of common ground early and often to bring those into the task groups,” she said. “If four different companies spot the same gap [in the market] how do we get them into the same boat to pool resources? Lets not monetise the base building blocks, there’s plenty of space for them to add their secret source on top.”
“The stronger we can make the organisation and the discipline in creating those extensions, the lower the risk of fragmentation,” she said.
To read the full article, click here
Related Semiconductor IP
- 64-bit, RISC-V, ultra-high performance processors
- 64-bit, RISC-V, performance and data computation processors
- 32-bit, RISC-V, deeply embedded processors
- RISC-V Display Connectivity Subsystem (DCS)
- RISC-V IOPMP IP
Related News
- Chinese RISC-V Chipmaker SpacemiT Launches K3 AI CPU, Highlighting the Rise of Open-Source Hardware in Intelligent Computing
- RISC-V Market Leadership Helped Andes Technology Drive Cumulative Shipments of AndesCore-Powered™ SoCs Beyond the 20 Billion Mark
- Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
- Why RISC-V + Blockchain Is the Conversation I’ve Been Waiting to Have
Latest News
- onsemi to Acquire Synaptics to Enable the Next Generation of Intelligent Systems for Physical AI
- EdgeAI Licensed Andes Technology CPU IP to Power Next-Generation Edge AI Neuromorphic Solution
- Jim Keller: ‘AI Still Obeys the Old Laws of Compute’
- OpenAI and Broadcom unveil LLM-optimized inference chip
- RAAAM Selects Avnet ASIC as its VCA Partner for TSMC’s 2nm GCRAM Development and Qualification